AD6650/PCB Analog Devices Inc, AD6650/PCB Datasheet - Page 32

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AD6650/PCB

Manufacturer Part Number
AD6650/PCB
Description
BOARD EVAL FOR AD6650 W/SOFTWARE
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD6650/PCB

Rohs Status
RoHS non-compliant
Module/board Type
Evaluation Board
For Use With/related Products
AD6650
AD6650
JTAG BOUNDARY SCAN
The AD6650 supports a subset of the IEEE Standard 1149.1
specification. For details of the standard, see the IEEE Standard
Test Access Port and Boundary-Scan Architecture, an IEEE-1149
publication.
The AD6650 has five pins associated with the JTAG interface.
These pins, listed in Table 16, are used to access the on-chip test
access port. All input JTAG pins are pull-ups except TCLK,
which is a pull-down.
Table 16. Boundary Scan Test Pins
Mnemonic
TRST
TCLK
TMS
TDI
TDO
The AD6650 supports three op codes, listed in Table 17. These
instructions set the mode of the JTAG interface.
Table 17. Boundary Scan Op Codes
Instruction
Bypass
Sample/Preload
Extest
A boundary scan description language (BSDL) file for this device is
available. Contact an Analog Devices sales representative for
more information.
Description
Test access port reset
Test clock
Test access port mode select
Test data input
Test data output
Op Code
11
01
00
Rev. A | Page 32 of 44
Bypass (2'b11)
The bypass instruction allows the IC to remain in normal
functional mode and selects a 1-bit bypass register between TDI
and TDO. During this instruction, serial data is transferred
from TDI to TDO without affecting operation of the IC.
Sample/Preload (2'b01)
The sample/preload instruction allows the IC to remain in
normal functional mode and selects the boundary scan register
to be connected between TDI and TDO. The boundary scan
register can be accessed by a scan operation to take a sample of
the functional data entering and leaving the IC. Also, test data
can be preloaded into the boundary-scan register before an
extest instruction.
Extest (2'b00)
The extest instruction places the IC into an external boundary-
test mode and selects which boundary scan register is connected
between TDI and TDO. During this operation, the boundary
scan register is accessed to drive test data off-chip via boundary
outputs and receive test data off-chip from boundary inputs.

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