AD6623S/PCB Analog Devices Inc, AD6623S/PCB Datasheet - Page 20

• Manufacturer Part Number: AD6623S/PCB
• Description: BOARD EVAL SGNL PROCESSOR AD6623
• Manufacturer: Analog Devices Inc

Specifications of AD6623S/PCB

• Rohs Status: RoHS non-compliant
• Module/board Type: Evaluation Board
• For Use With/related Products: AD6623
• Lead Free Status / Rohs Status: Not Compliant

AD6623
Channel
Address
0x10A
0x10B
0x10C
0x10D
0x10E
0x10F
0x110
0x111
0x112
0x113
0x114
0x115
0x116
Bit
Width
16
8
10
8
16
18
16
16
16
16
16
16
8
Description
15–8: N
7–0: O
9: Ch. A Compact FIR Input Word Length
8: Ch. A RCF PRBS Enable
7: Ch A RCF PRBS Length
6–4: Ch. A RCF Mode Select
000 = FIR
001 = /4-DQPSK Modulator
010 = GMSK Look-Up Table
011 = MSK Look-Up Table
100 = FIR compact mode
101 = 8-PSK
110 = 3 /8-8PSK Modulator
111 = QPSK Look-Up Table
3–0: Ch. A RCF Taps per Phase
7–6: RCF Coarse Scale (g):
5: Ch. A Allpass Ph. Eq. Enable
4–0: Serial Clock Divider (1, ..., 32)
15–2: Ch. A Unsigned Scale Factor
1–0: Reserved
17–16: Ch. A Time Slot Sync Select
15–0: Ch. A RCF Scale Hold-Off Counter
1) Ramp Down (if Ramp is enabled)
2) Update Scale and Mode
3) Ramp Up (if Ramp is enabled)
15–0: Ch. A RCF Phase EQ Coef1
15–0: Ch. A RCF Phase EQ Coef2
15–0: Ch. A RCF MPSK Magnitude 0
15–0: Ch. A RCF MPSK Magnitude 1
15–0: Ch. A RCF MPSK Magnitude 2
15–0: Ch. A RCF MPSK Magnitude 3
7: Reserved
6: Ch. A Serial Data Frame Select
0: 16 bits–8 I followed by 8 Q
1: 24 bits–12 I followed by 12 Q
0: 15
1: 8,388,607
00 = 0 dB
01 = –6 dB
10 = –12 dB
11 = –18 dB
00: Sync0 (See 0x001 Time Slot)
01: Sync1
10: Sync2
11: Sync3
0: Serial Data Frame Request
1: Serial Data Frame End
RCF
RCF
–1 B; 7–0: N
Table V. Channel A RCF Control Registers
RCF
–1 A
–20–
Channel
Address
0x117
0x118
0x119
0x11A–0x11F
0x120–0x13F 16
0x140–0x17F 16
PSK MODULATOR
The PSK Modulator is an AD6623 extension feature that is
only available when the control register bit 0x000:7 is high.
The PSK Modulator creates 32-bit complex inputs to the
Interpolating FIR Filter from two or three data bits captured
by the serial port. The FIR Filter operates exactly as if the 32-
bit word came directly from the serial port. There are three
PSK modulation options to choose from: /4-DQPSK, 8-PSK,
and 3 /8-8-PSK. Every symbol of any of these modulations
can be represented by one of the 16 phases shown in Figure 21.
0x180–0x1FF 16
Figure 21. 16-Phase Modulations
Bit
Width Description
6
6
5
5: Ch. A External SDFI Select
0: Internal SDFI
1: External SDFI
4: Ch. A SCLK Slave Select
0: Master
1: Slave
3: Ch. A Serial Fine Scale Enable
2: Ch. A Serial Time Slot Sync Enable
(ignored in FIR mode)
1: Ch. A Ramp Interpolation Enable
0: Ch. A Ramp Enable
5–0: Ch. A Mode 0 Ramp Length, R0–1
5–0: Ch. A Mode 1 Ramp Length, R1–1
4–0: Ch. A Ramp Rest Time, Q
Reserved
15–0: Ch. A Data Memory
15–14: Reserved
13–0: Ch. A Power Ramp Memory
15–0: Ch. A Coefficient Memory
This address is mirrored at 0x900–0x97F
and contiguously extended at
0x980–0x9FF
0
REV. A