AT88SC25616C-DK Atmel, AT88SC25616C-DK Datasheet - Page 6

• Manufacturer Part Number: AT88SC25616C-DK
• Description: KIT DEV CRYPTOMEMORY SMARTCARD
• Manufacturer: Atmel
• Series: CryptoMemory®r
• Type: Crypto and Secure Memoryr

Specifications of AT88SC25616C-DK

• Contents: PC/SC Card Reader, Sample Cards, API, Documentation and Tutorial
• For Use With/related Products: AT88SC Family
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: AT88SC25616CDK; AT88SC25616CDK

3. Pin Description
3.1
3.2
3.3
3.4
4. Detailed Description
4.1
5210B–SMIC–11/08
Supply Voltage (V
Clock (SCL/CLK)
Serial Data (SDA/IO)
Reset (RST)
User Memory
AT88SC0104/0204/0404/0808/1616/3216/6416/12816/25616C
The V
In the asynchronous T=0 protocol, the SCL/CLK input is used to provide the device with a carrier
frequency f. The nominal length of one bit emitted on I/O is defined as an "elementary time unit"
(etu) and is equal to 372/f. When the synchronous protocol is used, the SCL/CLK input is used
to clock data in on the positive clock edge and clock data out on the negative clock edge.
The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be
wired with any number of other open drain or open collector devices. An external pull up resistor
should be connected between SDA and V
value of this resistor and the system capacitance loading the SDA bus will determine the rise
time of SDA. This rise time will determine the maximum frequency during Read operations. Low
value pull up resistors will allow higher frequency operations while drawing higher average
power supply current.
CryptoMemory provides an ISO 7816-3 compliant asynchronous answer-to-reset sequence.
When the reset sequence is activated, the device will output the data programmed into the 64-bit
answer-to-reset register. When RST is low, all internal logic, access-rights, and write cycles are
in reset, except the asynchronous mode activation flag. A weak internal pull-up on the RST
input pad allows the device to be used in synchronous mode without bonding RST. For synchro-
nous only smart card applications, an external pull-up on RST is recommended to ensure
synchronous operation under any system timings or conditions. CryptoMemory does not sup-
port a synchronous answer-to-reset sequence. The RST input is not available in the plastic
package options for CryptoMemory.
To enable the security features of CryptoMemory, personalize the device by setting up registers
and loading appropriate passwords and keys. Do this by programming the configuration memory
using simple write and read commands. Gain access to the configuration memory by success-
fully presenting the secure code (write 7 password). After writing and verifying data in the
configuration memory, blow the security fuses to lock this information in the device. For addi-
tional information on personalizing CryptoMemory, please see the examples in the protocol
sections of this specification.
The EEPROM user memory is divided into 4, 8 or 16 user zones. Multiple zones allow for the
storage of different data types or files in different zones. Access to user zones is possible only
after meeting security requirements. The customer defines these security requirements in the
configuration memory during device personalization. When the same security requirements
define access to multiple zones, the zones effectively serve as one large storage area albeit with
the requirement to select each zone prior to acces..
CC
CC
)
input is a 2.7V to 5.5V positive voltage supplied by the host.
CC
, a nominal value of 4.7K ohm may be used. The
3