71M6521FE-IM/F Maxim Integrated Products, 71M6521FE-IM/F Datasheet - Page 43

• Manufacturer Part Number: 71M6521FE-IM/F
• Description: IC ENERGY METER 32K FLASH 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 71M6521FE-IM/F

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Status
3-0
Bit
7
6
5
4
71M6521DE/DH/FE Data Sheet
EEPROM Interface
The 71M6521DE/DH/FE provides hardware support for either type of EEPROM interface, a two-pin interface and a
three-pin interface. The interfaces use the EECTRL and EEDATA registers for communication.
Two-Pin EEPROM Interface
The dedicated 2-pin serial interface communicates with external EEPROM devices. The interface is multiplexed onto
pins DIO4 (SCK) and DIO5 (SDA) controlled by the DIO_EEX bit I/O RAM (see I/O RAM Table). The MPU
communicates with the interface through two SFR registers: EEDATA and EECTRL. If the MPU wishes to write a byte
of data to EEPROM, it places the data in EEDATA and then writes the ‘Transmit’ command (CMD = 0011) to EECTRL.
This initiates the transmit operation. The transmit operation is finished when the BUSY bit falls. Interrupt INT5 is also
asserted when BUSY falls. The MPU can then check the RX_ACK bit to see if the EEPROM acknowledged the
transmission.
A byte is read by writing the ‘Receive’ command (CMD = 0001) to EECTRL and waiting for the BUSY bit to fall. Upon
completion, the received data is in EEDATA. The serial transmit and receive clock is 78kHz during each transmission,
and the clock is held in a high state until the next transmission. The bits in EECTRL are shown in Table 57.
The EEPROM interface can also be operated by controlling the DIO4 and DIO5 pins directly (“bit-banging”).
However, controlling DIO4 and DIO5 directly is discouraged, because it may tie up the MPU to the point
where it may become too busy to process interrupts.
Rev 2
CMD[3:0
RX_ACK
TX_ACK
ERROR
Name
BUSY
]
Read/
Write
W
R
R
R
R
Reset
State
0
0
1
1
0
see CMD
Negative
Negative
Positive,
Polarity
Positive
Positive
Table
Table 57: EECTRL Status Bits
Description
1 when an illegal command is received.
1 when serial data bus is busy.
0 indicates that the EEPROM sent an ACK bit.
0 indicates when an ACK bit has been sent to the EEPROM
Others
CMD
0000
0001
0011
0101
0110
1001
Operation
No-op. Applying the no-op command will stop the I
(SCK, DIO4). Failure to issue the no-op command will keep
the SCK signal toggling.
Receive a byte from EEPROM and send ACK.
Transmit a byte to EEPROM.
Issue a ‘STOP’ sequence.
Receive the last byte from EEPROM, do not send ACK.
Issue a ‘START’ sequence.
No Operation, set the ERROR bit.
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C clock