ST16C2550IQ48-F Exar Corporation, ST16C2550IQ48-F Datasheet - Page 25

• Manufacturer Part Number: ST16C2550IQ48-F
• Description: IC DUART FIFO 16B 48TQFP
• Manufacturer: Exar Corporation
• Type: RS- 232 or RS- 485r

Specifications of ST16C2550IQ48-F

• Number Of Channels: 2, DUART
• Package / Case: 48-TQFP
• Features: *
• Fifo's: 16 Byte
• Protocol: RS232, RS485
• Voltage - Supply: 2.97 V ~ 5.5 V
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 4 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.97 V
• Supply Current: 3 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V or 5 V
• No. Of Channels: 2
• Supply Voltage Range: 2.97V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: TQFP
• No. Of Pins: 48
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1256

REV. 4.4.1
MSR[7]: CD Input Status
Normally this bit is the compliment of the CD# input. In the loopback mode this bit is equivalent to bit-3 in the
MCR register. The CD# input may be used as a general purpose input when the modem interface is not used.
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a reset or a power off-on cycle.
The Baud Rate Generator (BRG) is a 16-bit counter that generates the data rate for the transmitter. The rate is
programmed through registers DLL and DLM which are only accessible when LCR bit-7 is set to ‘1’.
“Programmable Baud Rate Generator” on page 10.
4.10
4.11
Scratch Pad Register (SPR) - Read/Write
Baud Rate Generator Registers (DLL and DLM) - Read/Write
T
ABLE
I/O SIGNALS
REGISTERS
RXRDY#
TXRDY#
OP2#
RTS#
DTR#
RHR
MCR
MSR
DLM
THR
FCR
SPR
LCR
LSR
DLL
IER
ISR
INT
TX
11: UART RESET CONDITIONS FOR CHANNEL A AND B
Bits 7-0 = 0xXX
Bits 7-0 = 0xXX
Bits 7-0 = 0xXX
Bits 7-0 = 0xXX
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x01
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x60
Bits 3-0 = Logic 0
Bits 7-4 = Logic levels of the inputs inverted
Bits 7-0 = 0xFF
Logic 1
Logic 1
Logic 1
Logic 1
Logic 1
Logic 0
Three-State Condition
25
RESET STATE
RESET STATE
2.97V TO 5.5V DUART WITH 16-BYTE FIFO
ST16C2550
See