XR16L788CQ-F Exar Corporation, XR16L788CQ-F Datasheet - Page 53

• Manufacturer Part Number: XR16L788CQ-F
• Description: IC UART 64B 3.3V OCTAL 100QFP
• Manufacturer: Exar Corporation
• Type: IrDA or RS- 485r

Specifications of XR16L788CQ-F

• Number Of Channels: 8
• Package / Case: 100-BQFP
• Features: *
• Fifo's: 64 Byte
• Protocol: RS485
• Voltage - Supply: 2.97 V ~ 5.5 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 6.25 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.97 V
• Supply Current: 5 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V or 5 V
• No. Of Channels: 8
• Uart Features: Tx/Rx FIFO Counters
• Supply Voltage Range: 2.97V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: QFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1283

REV. 1.2.3
GENERAL DESCRIPTION ............................................................................................... 1
PIN DESCRIPTIONS ....................................................................................................... 3
1.0 DESCRIPTION ........................................................................................................................................ 7
2.0 Functional Descriptions ........................................................................................................................ 7
3.0 XR16L788 REGISTERS ....................................................................................................................... 20
4.0 Internal Register Descriptions ........................................................................................................... 29
A
F
ORDERING INFORMATION
2.1 DEVICE RESET ................................................................................................................................................... 7
2.2 UART CHANNEL SELECTION .......................................................................................................................... 7
2.3 SIMULTANEOUS WRITE TO ALL CHANNELS ................................................................................................ 7
2.4 INT# OUPUT ....................................................................................................................................................... 8
2.5 CRYSTAL OSCILLATOR / BUFFER .................................................................................................................. 8
2.6 PROGRAMMABLE BAUD RATE GENERATOR ............................................................................................... 9
2.7 TRANSMITTER ................................................................................................................................................. 10
2.8 RECEIVER ........................................................................................................................................................ 11
2.9 THR AND RHR REGISTER LOCATIONS ........................................................................................................ 13
2.10 AUTOMATIC RTS/DTR HARDWARE FLOW CONTROL OPERATION ....................................................... 13
2.11 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL ..................................................................................... 16
2.12 SPECIAL CHARACTER DETECT ................................................................................................................. 16
2.13 AUTO RS485 HALF-DUPLEX CONTROL .................................................................................................... 16
2.14 INFRARED MODE .......................................................................................................................................... 17
2.15 SLEEP MODE WITH AUTO WAKE-UP ........................................................................................................ 18
2.16 INTERNAL LOOPBACK ................................................................................................................................. 19
3.1 DEVICE CONFIGURATION REGISTER SET ................................................................................................... 20
3.2 UART CHANNEL CONFIGURATION REGISTERS ......................................................................................... 27
4.1 RECEIVE HOLDING REGISTER (RHR) - READ ONLY .................................................................................. 29
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY .............................................................................. 29
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE ............................................................................... 29
F
F
T
T
Figure 5. Baud Rate Generator ..................................................................................................................................................... 9
Figure 7. Transmitter Operation in FIFO and Flow Control Mode ............................................................................................... 11
Figure 9. Receiver Operation in FIFO and Auto RTS Flow Control Mode .................................................................................. 12
Figure 10. Auto RTS/DTR and CTS/DSR Flow Control Operation ............................................................................................. 15
T
T
T
Figure 14. The Global Interrupt Registers, INT0, INT1, INT2 and INT3 ..................................................................................... 22
T
Figure 15. Timer/Counter circuit ................................................................................................................................................. 23
T
T
T
T
Figure 3. Typical oscillator connections ........................................................................................................................................ 8
Figure 4. External Clock Connection for Extended Data Rate ..................................................................................................... 9
T
Figure 6. Transmitter Operation in non-FIFO Mode ................................................................................................................... 11
Figure 8. Receiver Operation in non-FIFO Mode ....................................................................................................................... 12
T
Figure 11. Infrared Transmit Data Encoding and Receive Data Decoding ................................................................................. 17
Figure 12. Internal Loop Back .................................................................................................................................................... 19
Figure 13. The XR16L788 Registers .......................................................................................................................................... 20
EATURES
PPLICATIONS
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
2: INT# P
3: INT# P
6: A
7: XR16L788 R
8: D
9: UART C
10: TIMER CONTROL R
11: UART CHANNEL CONFIGURATION REGISTERS ................................................................................................... 27
12: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION. S
1: UART C
4: T
5: T
1. B
2. P
UTO
EVICE
YPICAL DATA RATES WITH A
RANSMIT AND
LOCK
IN
................................................................................................................................................ 1
O
X
........................................................................................................................................... 1
UT OF THE
IN
IN
ON
C
D
HANNEL
HANNEL
ONFIGURATION
O
O
IAGRAM
/X
PERATION FOR
PERATION
OFF
EGISTER
R
[7:0] I
ECEIVE
(S
S
D
............................................................................................................................................................. 1
ELECTION
EVICE
OFTWARE
........................................................................................................................... 2
F
S
NTERRUPT
EGISTER
OR
ETS
H
R
................................................................................................................................................. 2
T
OLDING
EGISTERS
R
RANSMITTER
ECEIVER
........................................................................................................................................... 20
) F
14.7456 MH
............................................................................................................................................ 7
LOW
TABLE OF CONTENTS
..................................................................................................................................... 24
S
R
OURCE
EGISTER
C
.............................................................................................................................. 21
............................................................................................................................... 8
ONTROL
.......................................................................................................................... 8
Z CRYSTAL OR EXTERNAL CLOCK AT
E
NCODING AND
L
OCATIONS
............................................................................................................... 16
HIGH PERFORMANCE 2.97V TO 5.5V OCTAL UART
I
, 16C550
C
LEARING
COMPATIBLE
............................................................................. 23
HADED BITS ARE ENABLED BY
16X S
.............................................................. 13
AMPLING
......................................... 10
EFR B
XR16L788
IT
-4. ....... 28