73S1210F-44IMR/F Maxim Integrated Products, 73S1210F-44IMR/F Datasheet - Page 61

• Manufacturer Part Number: 73S1210F-44IMR/F
• Description: IC SMART CARD READER 44-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 73S1210F-44IMR/F

• Core Processor: 80515
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: I²C, SmartCard, UART/USART
• Peripherals: LED, POR, WDT
• Number Of I /o: 8
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: 1210x
• Core: 80515
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: 73S1210F-EB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

DS_1210F_001
1.7.13 Keypad Interface
The 73S1210F supports a 30-button (6 rows x 5 columns) keypad (SPST Mechanical Contact Switches)
interface using 11 dedicated I/O pins. Figure 12 shows a simplified block diagram of the keypad
interface.
There are five drive lines (outputs) corresponding to columns and 6 sense lines (inputs) corresponding to
rows. Hysteresis and pull-ups are provided on all inputs (rows), which eliminate the need for external
resistors in the keypad. Key scanning happens by asserting one of the 5 column lines low and looking for
a low on a sense line indicating that a key is pressed (switch closed) at the intersection of the drive/sense
(column/row) line in the keypad. Key detection is performed by hardware with an incorporated debounce
timer. Debouncing time is adjustable through the
column scanning at an adjustable scanning rate and column scanning order through registers
and
a valid key is detected, an interrupt is generated and the valid value of the pressed key is automatically
Rev. 1.4
KORDERL
KCOL Register
7
73S1210F
6
5
4
KROW Register
3
7
/ KORDERH. Key scanning is disabled at reset and must be enabled by firmware. When
Column Value
Keypad Clock
2
6
(1)
1
5
Hardware Scan Enable
0
4
Row Value
3
5
2
Keypad Clock
KSTAT Register
1
7
Figure 12: Simplified Keypad Block Diagram
0
6
5
Scan
6
4
KORDERL / H Registers
7
7
KSIZE Register
3
6
6
2
5
Debouncing
Dividers
7
5
1
4
6
4
0
3
3
5
0
2
2
4
1
1
6
VDD
KSCAN Register
1
3
2
KSCAN
0
0
2
3
1
4
0
1kHz
5
6
register. Internal hardware circuitry performs
VDD
7
COL4:0
(1) KCOL is normally used as Read only
register. When hardware keyscan mode
is disabled, this register is to be used by
firmware to write the column data to
handle firmware scanning.
If smaller keypad than 6 x 5 is to be
implemented, unused row inputs
should be connected to VDD. Unused
column outputs should be left
unconnected.
73S1210F Data Sheet
KSCAN
61