MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 5

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Freescale Semiconductor
Mnemonic
AB
AIM
BROM
FlexCAN
CSM
DMAC
eMAC
MBUS
MMC/SD
GPIO
GPT
IDE
INC
I
SRAM
LIN
2
C
Block
Audio Bus
Audio Interface
Bootloader
Twin Controller Area
Network 2.0B
Communication Unit
Chip Select Module
Direct Memory
Access Controller
Module
Enhanced Multiply
Accumulate Module
Memory Bus Interface Bus Operation The bus interface controller transfers data between the ColdFire core or
Multimedia
Card/Secure Digital
Interface
General Purpose I/O
Interface
General Timer
Module
Integrated Drive
Electronics
Instruction Cache
Inter IC
Communication
Module
Internal 128-KB
SRAM
Internal Voltage
Regulator
Block Name
MCF5253 ColdFire
Table 1. Digital and Analog Modules (continued)
Audio
Interface
Audio
Interface
Boot ROM
Connectivity
Peripheral
Connectivity
Peripheral
Connectivity
Peripheral
Core
Flash Memory
Card Interface
System
integration
Timer
peripheral
Connectivity
peripheral
Core
Connectivity
peripheral
Internal
memory
Linear
regulator
Functional
Grouping
®
The audio interfaces connect to an internal bus that carries all audio data.
Each receiver places its received data on the audio bus and each
transmitter takes data from the audio bus for transmission.
The audio interface module provides the necessary input and output
features to receive and transmit digital audio signals over serial audio
interfaces (IIS/EIAJ) and over digital audio interfaces (IEC958).
The MCF5253 incorporates a ROM Bootloader, which enables booting
from UART, I2C, SPI, or IDE devices.
The FlexCan module is a full implementation of the Bosch CAN protocol
specification 2.0B, which supports both standard and extended message
frames.
Three programmable chip-select outputs (CS0/CS4, CS1, and CS2)
provide signals that enable glueless connection to external memory and
peripheral circuits.
There are four fully programmable DMA channels for quick data transfer.
The integrated eMAC unit provides a common set of DSP operations and
enhances the integer multiply instructions in the ColdFire architecture.
DMA and memory, peripherals, or other devices on the external bus.
The interface is Sony® Memory Stick®, SecureDigital, and Multi-Media
card compatible.
Note: The Sony Memory Interface does not support Sony MagicGate™.
GPIO signals are multiplexed with various other signals.
The timer module includes two general-purpose timers, each of which
contains a free-running 16-bit timer.
The IDE hardware consists of bus buffers for address and data and are
intended to reduce the load on the bus and prevent SDRAM and Flash
accesses from propagating to the IDE bus.
The instruction cache improves system performance by providing cached
instructions to the execution unit in a single clock cycle.
The two-wire I
standard, are bidirectional serial buses that exchange data between
devices.
The 128-Kbyte on-chip SRAM is split over two banks, SRAM0 (64K) and
SRAM1 (64K). It provides single clock-cycle access for the ColdFire core.
An internal 1.2 V regulator is used to supply the CPU and PLL sections of
the MCF5253, reducing the number of external components required and
allowing operation from a single supply rail, typically 3.3 volts.
Microprocessor Product Brief, Rev. 1
2
C bus interfaces, compliant with the Philips I
Brief Description
2
C bus
Features
5