MCF5373LCVM240 Freescale Semiconductor, MCF5373LCVM240 Datasheet

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... Interrupt Controllers (x2) • DMA Controller • FlexBus (External Interface) • Chip Configuration Module (CCM) • Reset Controller • General Purpose I/O interface © Freescale Semiconductor, Inc., 2008. All rights reserved. Document Number: MCF5373DS Rev. 4, 11/2008 MCF5373 MAPBGA–256 MAPBGA–196 ...

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... Timer Module Timing Specifications . . . . . . . . . 33 5.15 QSPI Electrical Specifications . . . . . . . . . . . . . . . . . . . 33 5.16 JTAG and Boundary Scan Timing . . . . . . . . . . . . . . . . 34 5.17 Debug AC Timing Specifications . . . . . . . . . . . . . . . . . 36 6 Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 7 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 7.1 Package Dimensions—196 MAPBGA . . . . . . . . . . . . . 40 7.2 Package Dimensions—160 QFP . . . . . . . . . . . . . . . . . 41 8 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 ® Microprocessor Data Sheet, Rev. 4 Freescale Semiconductor ...

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... The following table compares the various device derivatives available within the MCF537x family. Table 1. MCF537x Family Configurations Module ColdFire Version 3 Core with EMAC (Enhanced Multiply-Accumulate Unit) Core (System) Clock Peripheral and External Bus Clock (Core clock ÷ 3) Performance (Dhrystone/2.1 MIPS) Instruction/Data Cache MCF537x ColdFire Freescale Semiconductor (To/From SRAM backdoor) SDRAMC XBS ...

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... Package 2 Ordering Information Freescale Part Number MCF5372CAB180 MCF5372 RISC Microprocessor MCF5372LCVM240 MCF5372 RISC Microprocessor MCF53721CVM240 MCF53721 RISC Microprocessor MCF5373CAB180 MCF5373 RISC Microprocessor MCF5373LCVM240 MCF5373 RISC Microprocessor MCF537x ColdFire 4 MCF5372 MCF5372L MCF53721 MCF5373 MCF5373L 32 Kbytes • • — • — • • ...

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... EV /SDV high impedance state. There is no limit on how long after must powered up. IV should not lead the EV DD MCF537x ColdFire Freescale Semiconductor and the PLLV pins. The resistor and capacitors should be placed Ω 10 µF 0.1 µF GND Figure 2. System PLL V ...

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... O — — O ® Microprocessor Data Sheet, Rev SDV must power down. IV should DD DD MCF5372L MCF5372 MCF53721 MCF5373 MCF5373L 160 QFP 196 MAPBGA EVDD 95 K13 EVDD 86 L12 EVDD 91 L14 EVDD 93 K14 EVDD — P13 EVDD — N13 SDVDD 40 N1 Freescale Semiconductor ...

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... BE/BWE[3:0] PBE[3:0] OE PBUSCTL3 2 TA PBUSCTL2 R/W PBUSCTL1 TS PBUSCTL0 FB_CS[5:4] PCS[5:4] FB_CS[3:2] PCS[3:2] FB_CS1 PCS1 FB_CS0 — SD_A10 — SD_CKE — MCF537x ColdFire Freescale Semiconductor Alternate 1 Alternate 2 Mode Selection — — I — — I FlexBus FB_CS[5:4] — O — — SD_BA[1:0] — SD_A[13:11] — ...

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... MCF5372L MCF5372 MCF53721 MCF5373 MCF5373L 160 QFP 196 MAPBGA 102 F13 — F12 — F11 101 G14 — G13 — G12 100 G11 144 B6 145 A6 146 A5 147 B5 148–151 C5, D5, A4, B4 152 C4 153 A3 154 B3 155 A2 157, 158 D4, C3, B2, C2 Freescale Semiconductor ...

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... TS for DACK0, DT0IN for DREQ0, DT1IN for DACK1, and IRQ1 for DREQ1. QSPI_CS2 PQSPI5 QSPI_CS1 PQSPI4 QSPI_CS0 PQSPI3 QSPI_CLK PQSPI2 QSPI_DIN PQSPI1 QSPI_DOUT PQSPI0 MCF537x ColdFire Freescale Semiconductor Alternate 1 Alternate 2 USB Host & USB On-the-Go — — I/O USB VDD — — I/O USB VDD — ...

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... O EVDD ® Microprocessor Data Sheet, Rev. 4 MCF5372L MCF5372 MCF53721 MCF5373 MCF5373L 160 QFP 196 MAPBGA 143 C6 142 D6 141 A7 140 B7 85 M14 84 M13 83 N14 80 P14 G10 88 K11 L13 90 K12 74 L11 — L9, M9, N9, P9 — L10, M10, N10, P10 73 — Freescale Semiconductor ...

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... MCF53721 only JTAG_EN is asserted, these pins default to Alternate 1 (JTAG) functionality. The GPIO module is not responsible for assigning these pins. 8 Pull-down enabled internally on this signal for this mode. MCF537x ColdFire Freescale Semiconductor Alternate 1 Alternate 2 Test — — I EVDD Power Supplies — ...

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... Pin Assignments and Reset States 4.2 Pinout—196 MAPBGA The pinout for the MCF5373LCVM240, MCF5372LCVM240, and MCF53721CVM240 packages are shown below FEC_ FEC_ FEC_ FEC_ FEC_ MDIO TXER TXCLK RXD1 RXCLK B FEC_ FEC_ FEC_ FEC_ FEC_ MDC TXD1 TXEN RXD0 RXDV ...

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... D24 35 SD_DR_DQS 36 IVDD 37 SD_CLK 38 SD_CLK 39 SD_VDD 40 FB_CLK Figure 5. MCF5372CAB180 and MCF5373CAB180 Pinout Top View (160 QFP) MCF537x ColdFire Freescale Semiconductor Pin Assignments and Reset States ® Microprocessor Data Sheet, Rev. 4 120 A13 119 A12 118 A11 117 A10 116 A9 115 A8 114 ...

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... Section 5.4, “DC Electrical Specifications.” and range during instantaneous and DD > and could result in external power supply going DD load shunts current greater than maximum injection DD range during instantaneous and DD ® Microprocessor Data Sheet, Rev. 4 Unit °C ° greater than DD Freescale Semiconductor ...

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... Solving equations 1 and 2 for K gives: K where constant pertaining to the particular part. K can be determined from for a known T . Using this value of K, the values for any value MCF537x ColdFire Freescale Semiconductor Table 5. Thermal Characteristics Symbol 256MBGA Four layer board θ 37 JMA (2s2p) Four layer board θ ...

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... V 3.0 3 1.70 1.95 2.25 2.75 3.0 3.6 3 – 0.3 0 0.4 — – — 0 0.3 1.35 SDV DD + 0.3 1.7 SDV DD + 0.3 2 SDV – 0.3 0. – 0.3 0 – 0.3 0 SDV – 0.35 — DD 2.1 — 2.4 — Freescale Semiconductor ...

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... PLL Lock Time 3 8 Duty Cycle of reference 9 XTAL Current 10 Total on-chip stray capacitance on XTAL 11 Total on-chip stray capacitance on EXTAL Crystal capacitive load 12 Discrete load capacitance for XTAL 13 MCF537x ColdFire Freescale Semiconductor Symbol SDV Max APU C in Table 8. PLL Electrical Characteristics Symbol ...

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... V and variation in crystal oscillator frequency increase NOTE and Figure 8. ® Microprocessor Data Sheet, Rev. 4 Min. Max. Unit Value Value 2*C – – S_EXTAL 7 C PCB_EXTAL — sys/3 — TBD % f sys/3 0.8 2.2 %f sys/3 350 540 MHz . sys Table 9 Freescale Semiconductor ...

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... Frequency of Operation FB1 Clock Period (FB_CLK) Address, Data, and Control Output Valid (A[23:0], D[31:0], FB2 FB_CS[5:0], R/W, TS, BE/BWE[3:0] and OE) Address, Data, and Control Output Hold (A[23:0], D[31:0], FB3 FB_CS[5:0], R/W, TS, BE/BWE[3:0], and OE) MCF537x ColdFire Freescale Semiconductor 1.5V TSETUP THOLD Invalid 1.5V Valid 1. ...

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... ADDR[23:0] FB2 ADDR[31:X] DATA FB4 FB6 Figure 7. FlexBus Read Timing ® Microprocessor Data Sheet, Rev. 4 Symbol Min Max Unit t 3.5 — ns DVFBCH t 0 — ns DIFBCH t 4 — ns CVFBCH t 0 — ns CIFBCH Section 5.7.2, “DDR SDRAM AC S3 FB3 FB5 FB7 Freescale Semiconductor ...

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... Address, SD_CKE, SD_CAS, SD_RAS, SD_WE, SD_BA, SD5 SD_CS[1:0] - Output Valid Address, SD_CKE, SD_CAS, SD_RAS, SD_WE, SD_BA, SD6 SD_CS[1:0] - Output Hold 5 SD7 SD_SDR_DQS Output Valid SD_DQS[3:0] input setup relative to SD_CLK SD8 MCF537x ColdFire Freescale Semiconductor FB1 ADDR[23:0] FB2 ADDR[31:X] DATA FB6 FB7 Figure 8. FlexBus Write Timing Table 10 ...

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... SD11 SD12 WD1 WD2 WD3 Figure 9. SDR Write Timing ® Microprocessor Data Sheet, Rev. 4 Min Max Unit Does not apply. 0.5×SD_CLK fixed width. 0.25 × — ns SD_CLK 1.0 — ns 0.75 × SD_CLK — 0.5 1.5 — ns SD3 WD4 Freescale Semiconductor ...

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... Address, SD_CKE, SD_CAS, SD_RAS, SD_WE, DD5 SD_CS[1:0] - Output Hold DD6 Write Command to first DQS Latching Transition Data and Data Mask Output Setup (DQ-->DQS) Relative DD7 DQS (DDR Write Mode) MCF537x ColdFire Freescale Semiconductor SD2 SD5 3/4 MCLK Reference COL tDQS SD6 Board Delay Board Delay ...

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... Symbol t DQDMI 7 t DVDQ 8 0.25 × SD_CLK t DIDQ t DQLSDCH t DQRPRE t DQRPST t DQWPRE t DQWPST ® Microprocessor Data Sheet, Rev. 4 Min Max Unit 1.0 — ns — — 0.5ns 0.5 — ns 0.9 1.1 SD_CLK 0.4 0.6 SD_CLK 0.25 SD_CLK 0.4 0.6 SD_CLK Freescale Semiconductor ...

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... SD_CLK SD_CLK SD_CSn,SD_WE, CMD SD_RAS, SD_CAS DD4 A[13:0] ROW DM3/DM2 SD_DQS3/SD_DQS2 D[31:24]/D[23:16] MCF537x ColdFire Freescale Semiconductor DD1 DD2 DD3 DD5 DD6 COL WD1 WD2 WD3 WD4 Figure 11. DDR Write Timing ® Microprocessor Data Sheet, Rev. 4 Electrical Characteristics DD7 DD8 DD7 ...

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... Table 12. GPIO Timing Symbol t CHPOV t CHPOI t PVCH t CHPI ® Microprocessor Data Sheet, Rev. 4 DD3 DD9 DQS Read Postamble WD1 WD2 WD3 WD4 DQS Read Preamble Postamble WD1 WD2 WD3 WD4 Min Max Unit — 1.5 — — ns 1.5 — ns Freescale Semiconductor ...

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... Thus, RESET must be held a minimum of 100 ns. FB_CLK R1 RESET RSTOUT Configuration Overrides*: (RCON, Override pins]) Figure 14. RESET and Configuration Override Timing Refer to the CCM chapter of the MCF5373 Reference Manual for more information. MCF537x ColdFire Freescale Semiconductor Figure 13. GPIO Timing Symbol t RVCH t ...

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... BCLK ® Microprocessor Data Sheet, Rev Min Max Units 8 × t — ns SYS 45% 55% t MCLK 8 × t — ns SYS 45% 55% t BCLK — — ns — — — — Min Max Units 8 × t — ns SYS 45% 55% t BCLK 10 — — ns — — — — ns Freescale Semiconductor ...

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... C input timing parameters shown in 2 Table 16 Input Timing Specifications between SCL and SDA Num I1 Start condition hold time I2 Clock low period I3 I2C_SCL/I2C_SDA rise time (V I4 Data hold time MCF537x ColdFire Freescale Semiconductor S10 Figure 15. SSI Timing – Master Modes S11 S12 ...

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... Microprocessor Data Sheet, Rev. 4 Min Max Units — — t cyc 0 — — t cyc 2 — t cyc 17. Min Max Units 6 — t cyc 10 — t cyc — — µs 7 — t cyc — — t cyc 2 — t cyc 20 — t cyc 10 — t cyc 2 Table 17. The I C interface Freescale Semiconductor ...

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... FEC_TXCLK to FEC_TXD[3:0], FEC_TXEN, FEC_TXER invalid M6 FEC_TXCLK to FEC_TXD[3:0], FEC_TXEN, FEC_TXER valid M7 FEC_TXCLK pulse width high M8 FEC_TXCLK pulse width low Figure 19 shows MII transmit signal timings listed in MCF537x ColdFire Freescale Semiconductor Table 18. MII Receive Signal Timing Table 18 Table 19. MII Transmit Signal Timing Table 19. ® ...

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... M13 FEC_MDIO (input) to FEC_MDC rising edge hold M14 FEC_MDC pulse width high M15 FEC_MDC pulse width low MCF537x ColdFire Min 1.5 M9 Characteristic ® Microprocessor Data Sheet, Rev. 4 Max Unit — FEC_TXCLK period Min Max Unit 0 — ns — — — ns 40% 60% FEC_MDC period 40% 60% FEC_MDC period Freescale Semiconductor ...

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... QSPI_CS[3:0] to QSPI_CLK QS2 QSPI_CLK high to QSPI_DOUT valid. QS3 QSPI_CLK high to QSPI_DOUT invalid. (Output hold) QS4 QSPI_DIN to QSPI_CLK (Input setup) QS5 QSPI_DIN to QSPI_CLK (Input hold) MCF537x ColdFire Freescale Semiconductor M14 M15 M10 M11 M12 M13 Characteristic Characteristic ® Microprocessor Data Sheet, Rev. 4 ...

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... Figure 22. QSPI Timing 1 Symbol f JCYC t JCYC t JCW t JCRF t BSDST t BSDHT t BSDV t BSDZ t TAPBST t TAPBHT t TDODV t TDODZ t TRSTAT t TRSTST ® Microprocessor Data Sheet, Rev. 4 QS5 Min Max Unit DC 1/4 f sys/3 4 — t CYC 26 — — — — — 100 — — ns Freescale Semiconductor ...

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... Data Inputs Data Outputs Data Outputs Data Outputs Figure 24. Boundary Scan (JTAG) Timing TCLK V IL TDI TMS TDO TDO TDO TCLK TRST MCF537x ColdFire Freescale Semiconductor Figure 23. Test Clock Input Timing J5 Input Data Valid J7 Output Data Valid J8 J7 Output Data Valid V ...

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... D2 D1 Figure 27. Real-Time Trace AC Timing D5 Current D4 Past Figure 28. BDM Serial Port AC Timing ® Microprocessor Data Sheet, Rev. 4 27. Max Units 1/f SYS SYS 3.0 ns — ns — PSTCLK — PSTCLK — PSTCLK — PSTCLK Next Current Table 26 shows the typical Freescale Semiconductor ...

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... See the description of the low-power control register (LCPR) in the MCF537x Reference Manual for more information on stop modes 0–3. 450 400 350 300 250 200 150 100 Figure 29. Current Consumption in Low-Power Modes MCF537x ColdFire Freescale Semiconductor 58 MHz 64 MHz 72 MHz (Typ) (Typ) (Typ) 3.9 3.92 4.0 1.04 1.04 1 ...

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... V SDV and 1 120 160 Core Frequency (MHz) ® Microprocessor Data Sheet, Rev Unit mA power DD 200 240 Freescale Semiconductor ...

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... This section contains drawings showing the pinout and the packaging and mechanical characteristics of the MCF537x devices. The mechanical drawings are the latest revisions at the time of publication of this document. The most up-to-date mechanical drawings can be found at the product summary page located at http://www.freescale.com/coldfire. MCF537x ColdFire Freescale Semiconductor NOTE ® Microprocessor Data Sheet, Rev. 4 Package Information ...

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... Package Information 7.1 Package Dimensions—196 MAPBGA Figure 31 shows the MCF5373LCVM240, MCF5372LCVM240, and MCF53721CVM240 package dimensions Laser mark for pin 1 Y identification in this area E Top View 0. 13X 3 b 196X Bottom View 0. View M-M 0.10 Z Figure 31. 196 MAPBGA Package Dimensions (Case No. 1128A-01) ...

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... Package Dimensions—160 QFP Figure 32 and Figure 33 show the MCF5372CAB180 and MCF5373CAB180 package dimensions. Figure 32. 160QFP Package Dimensions (Sheet MCF537x ColdFire Freescale Semiconductor Top View ® Microprocessor Data Sheet, Rev. 4 Package Information 41 ...

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... Package Information Figure 33. 160QFP Package Dimensions (Sheet MCF537x ColdFire 42 ® Microprocessor Data Sheet, Rev. 4 Freescale Semiconductor ...

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... Added MCF53721 device information throughout: features list, family configuration table, ordering information table, signals description table, and relevant package diagram titles • Remove Footnote 1 from • Changed document type from Advance Information to Technical Data. MCF537x ColdFire Freescale Semiconductor Substantive Changes Table 1. Figure 4 is correct. ...

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... Signal Information and Muxing table, and GPIO timing diagram MCF537x ColdFire 44 Substantive Changes Table 1 for the MCF53721 device. Table 25 from 1 for min and sys sys Figure 7 and Table 2 for MCF5373LCVM240 Table 6. Table 10 and Table 11: ® Microprocessor Data Sheet, Rev. 4 Date of Release 4/2008 11/2008 Freescale Semiconductor ...

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... MCF537x ColdFire Freescale Semiconductor ® Microprocessor Data Sheet, Rev. 4 Revision History 45 ...

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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...