MCR908JL3ECDWE Freescale Semiconductor, MCR908JL3ECDWE Datasheet - Page 133

• Manufacturer Part Number: MCR908JL3ECDWE
• Description: IC MCU 4K FLASH 8MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCR908JL3ECDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 23
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

15.4.4 Break Flag Control Register (BFCR)
The break control register contains a bit that enables software to clear status bits while the MCU is in a
break state.
BCFE — Break Clear Flag Enable Bit
15.5 Low-Power Modes
The WAIT and STOP instructions put the MCU in low-power-consumption standby modes.
15.5.1 Wait Mode
If enabled, the break module is active in wait mode. In the break routine, the user can subtract one from
the return address on the stack if SBSW is set (see
zero to it.
15.5.2 Stop Mode
A break interrupt causes exit from stop mode and sets the SBSW bit in the break status register.
See
Freescale Semiconductor
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
5.7 SIM
1 = Status bits clearable during break
0 = Status bits not clearable during break
Address:
Registers.
Reset:
Read:
Write:
$FE03
BCFE
Bit 7
R
0
Figure 15-7. Break Flag Control Register (BFCR)
= Reserved
R
MC68HC908JL3E Family Data Sheet, Rev. 4
6
R
5
5.6 Low-Power
R
4
R
3
Modes). Clear the SBSW bit by writing
R
2
R
1
Low-Power Modes
Bit 0
R
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