MCIMX255AJM4A Freescale Semiconductor, MCIMX255AJM4A Datasheet - Page 53

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MCIMX255AJM4A

Manufacturer Part Number
MCIMX255AJM4A
Description
IC MPU IMX25 AUTO 400MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX25r
Datasheet

Specifications of MCIMX255AJM4A

Core Processor
ARM9
Core Size
32-Bit
Speed
400MHz
Connectivity
1-Wire, CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
128
Program Memory Type
External Program Memory
Ram Size
144K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.52 V
Data Converters
A/D 3x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
400-MAPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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3.7.4.1
Figure 20
parameters (P1–P7) shown in the figures. A frame starts with a rising/falling edge on VSYNC, then
HSYNC is asserted and holds for the entire line. The pixel clock is valid as long as HSYNC is asserted.
Freescale Semiconductor
Figure 20. CSI Gated Clock Mode—Sensor Data at Falling Edge, Latch Data at Rising Edge
Figure 21. CSI Gated Clock Mode—Sensor Data at Rising Edge, Latch Data at Falling Edge
and
Gated Clock Mode Timing
Figure 21
DATA[15:0]
PIXCLK
VSYNC
HSYNC
DATA[15:0]
PIXCLK
VSYNC
HSYNC
i.MX25 Applications Processor for Automotive Products, Rev. 8
shows the gated clock mode timings for CSI, and
P1
P1
P3
P2
P3
P2
P4
P4
P5
P7
P6
P6
P7
P5
Table 41
describes the timing
53

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