MSC7119VF1200 Freescale Semiconductor, MSC7119VF1200 Datasheet - Page 30

• Manufacturer Part Number: MSC7119VF1200
• Description: DSP 16BIT W/DDR CTRLR 400-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MSC711x StarCorer
• Type: Fixed Pointr

Specifications of MSC7119VF1200

• Interface: Host Interface, I²C, UART
• Clock Rate: 300MHz
• Non-volatile Memory: ROM (8 kB)
• On-chip Ram: 464kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: *
• Package / Case: 400-MAPBGA
• Device Core Size: 16b
• Clock Freq (max): 300MHz
• Mips: 300
• Device Input Clock Speed: 300MHz
• Ram Size: 256KB
• Operating Supply Voltage (typ): 1.2/2.5/3.3V
• Operating Supply Voltage (min): 1.14/2.38/3.14V
• Operating Supply Voltage (max): 1.26/2.63/3.47V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 400
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Electrical Characteristics
2.5.6.2
2.5.6.3
30
No.
800
801
802
805
806
No.
807
Transmit clock period:
• MII: TXCLK
• RMII: REFCLK
Transmit clock pulse width high—as a percent of clock period
• MII: RXCLK
• RMII: REFCLK
Transmit clock pulse width low—as a percent of clock period:
• MII: RXCLK
• RMII: REFCLK
Transmit clock to TXDn, TX_EN, TX_ER invalid
Transmit clock to TXDn, TX_EN, TX_ER valid
• MII: CRS and COL minimum pulse width (1.5 × TXCLK period)
• RMII: CRS_DV minimum pulse width (1.5 x REFCLK period)
Transmit Signal Timing
Asynchronous Input Signal Timing
Transmit
CRS_DV
TX_EN
TX_ER
TXDn
clock
CRS
COL
Figure 12. Asynchronous Input Signal Timing
Table 23. Asynchronous Input Signal Timing
Figure 11. Ethernet Receive Signal Timing
Table 22. Transmit Signal Timing
Characteristics
Characteristics
805
MSC7119 Data Sheet, Rev. 8
806
801
800
Valid
807
802
Freescale Semiconductor
Min
Min
40
20
35
14
35
14
60
30
—
7
7
4
Max
Max
—
—
65
—
—
65
—
—
—
14
—
—
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%