L4949DR2G ON Semiconductor, L4949DR2G Datasheet - Page 8

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L4949DR2G

Manufacturer Part Number
L4949DR2G
Description
IC REG LDO 100MA 5V RESET 8SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of L4949DR2G

Regulator Topology
Positive Fixed
Voltage - Output
5V
Voltage - Input
Up to 28V
Voltage - Dropout (typical)
0.3V @ 100mA
Number Of Regulators
1
Current - Output
100mA
Current - Limit (min)
105mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
L4949DR2GOS

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Reset Circuit
Figure 18.
threshold of 4.5 V is defined by the internal reference
voltage and standby output divider.
time of an external capacitor C
discharge time limitation of the reset capacitor C
proportional to the value of C
circuit increases the noise immunity.
Out
The block circuit diagram of the reset circuit is shown in
The reset circuit supervises the output voltage. The reset
The reset pulse delay time t
The reaction time of the reset circuit originates from the
Reg
1.23 V V
22 k
ref
Figure 18. Reset Circuit
t
RD
2.0 mA
+
C
T
T
. The reaction time of the reset
2.0 mA
RD
T
x 2.0 V
:
C
, is defined by the charge
T
+
-
2.0 V
T
http://onsemi.com
and is
Reset
8
marginally longer than the reaction time results in a shorter
reset delay time.
voltage drops longer than approximately 50 ms. The typical
reset output waveforms are shown in Figure 19.
Sense Comparator
internal voltage reference of typical 1.23 V. The use of an
external voltage divider makes this comparator very flexible
in the application.
or after a protection diode and to provide additional
information to the microprocessor such as low voltage
warnings.
VRT + 0.1 V
Output voltage drops below the reset threshold only
The nominal reset delay time will be generated for output
The sense comparator compares an input signal with an
It can be used to supervise the input voltage either before
Reset
5.0 V
3.0 V
UKT
V
Figure 19. Typical Reset Output Waveforms
out
Switch On
V
V
out1
t
in
RD
t
RR
Input Drop
t
Dump
t
RD
R
40 V
Overload
Output
Switch Off
t

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