CS8161YT5 ON Semiconductor, CS8161YT5 Datasheet - Page 8

• Manufacturer Part Number: CS8161YT5
• Description: IC REG LDO 12V/5V STRGHT TO220-5
• Manufacturer: ON Semiconductor

Specifications of CS8161YT5

• Regulator Topology: Positive Fixed
• Voltage - Output: 12V, 5V
• Voltage - Input: 6 ~ 26 V
• Voltage - Dropout (typical): 0.35V @ 400mA, 0.35V @ 200mA
• Number Of Regulators: 2
• Current - Output: 400mA, 200mA
• Current - Limit (min): 400mA, 200mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Package / Case: TO-220-5 (Straight Leads)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: CS8161YT5OS

the test and applications circuit should work for most
applications, however it is not necessarily the best solution.
particular application, start with tantalum capacitors of the
recommended value on each output and work towards less
expensive alternative parts for each output in turn.
Step 1: Place the completed circuit with a tantalum
capacitor of the recommended value in an environmental
chamber at the lowest specified operating temperature and
monitor the outputs on the oscilloscope. A decade box
connected in series with the capacitor C
higher ESR of an aluminum capacitor.(Leave the decade
box outside the chamber, the small resistance added by the
longer leads is negligible)
Step 2: With the input voltage at its maximum value,
increase the load current slowly from zero to full load while
observing the output for any oscillations. If no oscillations
are observed, the capacitor is large enough to ensure a stable
design under steady state conditions.
Step 3: Increase the ESR of the capacitor from zero using the
decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that cause
the greatest oscillation. This represents the worst case load
conditions for the regulator at low temperature.
Step 4: Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage
conditions.
Step 5: If the capacitor C
with the next smaller valued capacitor. (A smaller capacitor
will usually cost less and occupy less board space.) If the
capacitor oscillates within the range of expected operating
conditions, repeat steps 3 and 4 with the next larger standard
capacitor value.
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real work
environment. Vary the ESR to reduce ringing.
Step 7: Raise the temperature to the highest specified
operating temperature. Vary the load current as instructed in
step 5 to test for any oscillations.
ESR is found, a safety factor should be added to allow for the
tolerance of the capacitor and any variations in regulator
performance. Most good quality aluminum electrolytic
capacitors have a tolerance of ±20% so the minimum value
found should be increased by at least 50% to allow for this
tolerance plus the variation which will occur at low
The values for the output capacitors C
To determine acceptable values for C
Once the minimum capacitor value with the maximum
2
is adequate, repeat steps 3 and 4
2
2
will simulate the
and C
2
and C
3
shown in
3
http://onsemi.com
for a
CS8161
8
temperatures. The ESR of the capacitors should be less than
50% of the maximum allowable ESR found in step 3 above.
Once the value for C
determine the appropriate value for C
Calculating Power Dissipation in a
Dual Output Linear Regulator
regulator (Figure 19) is
where:
permissible value of R
package section of the data sheet. Those packages with
R
the die temperature below 150°C.
dissipate the heat generated by the IC, and an external
heatsink will be required.
P D(max) + V IN(max) * V OUT1(min) I OUT1(max) )
qJA
The maximum power dissipation for a dual output
V
V
V
I
application,
I
application, and
I
I
Once the value of P
The value of R
In some cases, none of the packages will be sufficient to
V
OUT1(max)
OUT2(max)
Q
OUT(max)
IN
IN(max)
OUT1(min)
OUT2(min)
’s less than the calculated value in equation 2 will keep
is the quiescent current the regulator consumes at
Figure 19. Dual Output Regulator With Key
I
IN
V IN(max) * V OUT2(min) I OUT2(max) ) V IN(max) IQ
Performance Parameters Labeled.
is the maximum input voltage,
.
is the minimum output voltage from V
is the minimum output voltage from V
is the maximum output current, for the
is the maximum output current, for the
R qJA +
qJA
2
can be compared with those in the
qJA
Regulator
Control
Features
is determined, repeat the steps to
D(max)
Smart
can be calculated:
150°C * T A
I
Q
P D
is known, the maximum
3
.
I
I
OUT1
OUT2
V
V
OUT2
OUT1
OUT1
OUT2
(1)
(2)
,
,