IRU1010CD International Rectifier, IRU1010CD Datasheet - Page 4

• Manufacturer Part Number: IRU1010CD
• Description: IC REG LDO ADJ 1.0A D-PAK
• Manufacturer: International Rectifier

Specifications of IRU1010CD

• Regulator Topology: Positive Adjustable
• Voltage - Output: 2.5 ~ 3.6 V
• Voltage - Input: Up to 7V
• Voltage - Dropout (typical): 1.1V @ 1A
• Number Of Regulators: 1
• Current - Output: 1A
• Current - Limit (min): 1.1A
• Operating Temperature: 0°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: TO-252-2, DPak (2 Leads + Tab), TO-252AA, SC-63
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *IRU1010CD; IRU1010-CD; IRU1010-CD

IRU1010(PbF)
Output Voltage Setting
The IRU1010 can be programmed to any voltages in the
range of 1.25V to 5.5V with the addition of R1 and R2
external resistors according to the following formula:
The IRU1010 keeps a constant 1.25V between the out-
put pin and the adjust pin. By placing a resistor R1 across
these two pins a constant current flows through R1, add-
ing to the I
a voltage equal to the (1.25/R1)×R2+I
be added to the 1.25V to set the output voltage. This is
summarized in the above equation. Since the minimum
load current requirement of the IRU1010 is 10mA, R1 is
typically selected to be 121Ω resistor so that it auto-
matically satisfies the minimum current requirement.
Notice that since I
only adds a small error to the output voltage and should
only be considered when a very precise output voltage
setting is required. For example, in a typical 3.3V appli-
cation where R1=121Ω and R2=200Ω the error due to
I
Load Regulation
Since the IRU1010 is only a three-terminal device, it is
not possible to provide true remote sensing of the output
voltage at the load. Figure 4 shows that the best load
regulation is achieved when the bottom side of R2 is
connected to the load and the top side of R1 resistor is
connected directly to the case or the V
regulator and not to the load. In fact, if R1 is connected
4
ADJ
V
IN
is only 0.3% of the nominal set point.
V
Where:
V
I
R1 and R2 as shown in Figure 3:
ADJ
Figure 3 - Typical application of the IRU1010
OUT
REF
= 50µA Typically
= 1.25V Typically
= V
for programming the output voltage.
ADJ
REF
current and into the R2 resistor producing
× 1+
V
IN
(
ADJ
IRU1010
is typically in the range of 50µA it
R2
R1
Adj
)
+ I
I
ADJ
V
ADJ
OUT
= 50uA
×R2
V
REF
ADJ
×R2 which will
R1
R2
OUT
pin of the
Vout
www.irf.com
to the load side, the effective resistance between the
regulator and the load is gained up by the factor of (1+
R2/R1), or the effective resistance will be R
R2/R1). It is important to note that for high current appli-
cations, this can represent a significant percentage of
the overall load regulation and one must keep the path
from the regulator to the load as short as possible to
minimize this effect.
Stability
The IRU1010 requires the use of an output capacitor as
part of the frequency compensation in order to make the
regulator stable. Typical designs for microprocessor ap-
plications use standard electrolytic capacitors with a
typical ESR in the range of 50 to 100mΩ and an output
capacitance of 500 to 1000µF. Fortunately as the ca-
pacitance increases, the ESR decreases resulting in a
fixed RC time constant. The IRU1010 takes advantage
of this phenomena in making the overall regulator loop
stable. For most applications a minimum of 100µF alu-
minum electrolytic capacitor such as Sanyo MVGX se-
ries, Panasonic FA series as well as the Nichicon PL
series insures both stability and good transient response.
Thermal Design
The IRU1010 incorporates an internal thermal shutdown
that protects the device when the junction temperature
exceeds the maximum allowable junction temperature.
Although this device can operate with junction tempera-
tures in the range of 150 C, it is recommended that the
selected heat sink be chosen such that during maxi-
mum continuous load operation the junction tempera-
ture is kept below this number. The next example for a
SCSI terminator application shows the steps in sellecting
the proper regulator in a surface-mount package. (See
IRU1015 for non-surface-mount packages)
V
IN
Figure 4 - Schematic showing connection
V
IN
IRU1010
for best load regulation.
Adj
V
OUT
PARASITIC LINE
RESISTANCE
R2
R1
R
P
P(eff)
=R
Rev. 1.7
P
×(1+
R
L