S-L2980A40MC-TF-G Seiko Instruments, S-L2980A40MC-TF-G Datasheet - Page 12

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S-L2980A40MC-TF-G

Manufacturer Part Number
S-L2980A40MC-TF-G
Description
IC REG LDO 150MA 4.0V SOT23-5
Manufacturer
Seiko Instruments
Datasheet

Specifications of S-L2980A40MC-TF-G

Regulator Topology
Positive Fixed
Voltage - Output
4V
Voltage - Input
Up to 10V
Voltage - Dropout (typical)
0.11V @ 50mA
Number Of Regulators
1
Current - Output
150mA (Min)
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-23-5, SC-74A, SOT-25
Number Of Outputs
1
Polarity
Positive
Input Voltage Max
10 V
Output Voltage
4 V
Output Type
Fixed
Dropout Voltage (max)
0.14 V
Output Current
150 mA
Line Regulation
0.2 % / V
Load Regulation
40 mV
Voltage Regulation Accuracy
2 %
Maximum Power Dissipation
0.6 W
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Limit (min)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S-L2980A40MC-TF-G
Manufacturer:
SEIKO/精工
Quantity:
20 000
12
HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR
S-L2980 Series
Selection of Output Capacitor (C
3. Shutdown Pin (ON/OFF Pin)
The S-L2980 series needs an output capacitor between VOUT pin and VSS pin for phase compensation.
A ceramic capacitor whose capacitance is 1.0 μF or more
conductor) capacitor, a tantalum capacitor or an aluminum electrolyte capacitor is used, the capacitance
should be 2.2 μF or more and the ESR should be 10 Ω or less.
The value of the output overshoot or undershoot transient response varies depending on the value of the
output capacitor.
*1. If the product whose output voltage is 1.7 V or less will be used, the capacitance should be 2.2 μF
Sufficient evaluation including temperature dependency in the actual environment is needed.
This pin starts and stops the regulator.
When the ON/OFF pin is turned to the shutdown level, the operation of all internal circuits stops, the
built-in P-channel MOS FET output transistor between VIN pin and VOUT pin is turned off to make
current consumption drastically reduced. The VOUT pin becomes the Vss level due to internally divided
resistance of several hundreds kΩ between the VOUT pin and VSS pin.
Furthermore, the structure of the ON/OFF pin is as shown in Figure 12. Since the ON/OFF pin is
neither pulled down nor pulled up internally, do not use it in the floating state. In addition, please note
that current consumption increases if a voltage of 0.3 V to VIN–0.3 V is applied to the ON/OFF pin.
When the ON/OFF pin is not used, connect it to the VIN pin in case the logic type is “A” and to the VSS
pin in case of “B”.
or more.
Logic type
ON/OFF
A
A
B
B
Figure 12
“H”: Power on
“H”: Power off
“L”: Power on
“L”: Power off
ON/OFF pin
VSS
VIN
L
Seiko Instruments Inc.
)
Internal circuit
Operating
Operating
Stop
Stop
Table 5
*1
can be used. When an OS (Organic Semi-
VOUT pin voltage
Set value
Set value
V
V
SS
SS
level
level
Current consumption
I
I
I
I
Rev.5.0
SS1
SS2
SS2
SS1
_00

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