LT1963AES8 Linear Technology, LT1963AES8 Datasheet - Page 14

IC LDO REG LOW NOISE 1.5A 8-SOIC

LT1963AES8

Manufacturer Part Number
LT1963AES8
Description
IC LDO REG LOW NOISE 1.5A 8-SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LT1963AES8

Regulator Topology
Positive Adjustable
Voltage - Output
1.21 ~ 20 V
Voltage - Input
2.1 ~ 20 V
Voltage - Dropout (typical)
0.34V @ 1.5A
Number Of Regulators
1
Current - Output
1.5A
Current - Limit (min)
1.6A
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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LT1963A Series
APPLICATIONS INFORMATION
The LT1963A series are 1.5A low dropout regulators opti-
mized for fast transient response. The devices are capable
of supplying 1.5A at a dropout voltage of 350mV. The low
operating quiescent current (1mA) drops to less than 1µA
in shutdown. In addition to the low quiescent current, the
LT1963A regulators incorporate several protection features
which make them ideal for use in battery-powered systems.
The devices are protected against both reverse input and
reverse output voltages. In battery backup applications
where the output can be held up by a backup battery when
the input is pulled to ground, the LT1963A-X acts like it
has a diode in series with its output and prevents reverse
current flow. Additionally, in dual supply applications
where the regulator load is returned to a negative supply,
the output can be pulled below ground by as much as 20V
and still allow the device to start and operate.
Adjustable Operation
The adjustable version of the LT1963A has an output volt-
age range of 1.21V to 20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 2.
The device servos the output to maintain the voltage at
the ADJ pin at 1.21V referenced to ground. The current
in R1 is then equal to 1.21V/R1 and the current in R2 is
the current in R1 plus the ADJ pin bias current. The ADJ
pin bias current, 3µA at 25°C, flows through R2 into the
ADJ pin. The output voltage can be calculated using the
formula in Figure 2. The value of R1 should be less than
4.17k to minimize errors in the output voltage caused by
the ADJ pin bias current. Note that in shutdown the output
is turned off and the divider current will be zero.
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifications for output voltages greater than 1.21V will
be proportional to the ratio of the desired output voltage
to 1.21V: V
output current change of 1mA to 1.5A is – 3mV typical at
V
Output Capacitors and Stability
The LT1963A regulator is a feedback circuit. Like any
feedback circuit, frequency compensation is needed to
14
OUT
(5V/1.21V)(–3mV) = –12.4mV
= 1.21V. At V
OUT
/1.21V. For example, load regulation for an
OUT
= 5V, load regulation is:
make it stable. For the LT1963A, the frequency compensa-
tion is both internal and external—the output capacitor.
The size of the output capacitor, the type of the output
capacitor, and the ESR of the particular output capacitor
all affect the stability.
In addition to stability, the output capacitor also affects
the high frequency transient response. The regulator
loop has a finite band width. For high frequency transient
loads, recovery from a transient is a combination of the
output capacitor and the bandwidth of the regulator. The
LT1963A was designed to be easy to use and accept a
wide variety of output capacitors. However, the frequency
compensation is affected by the output capacitor and opti-
mum frequency stability may require some ESR, especially
with ceramic capacitors.
For ease of use, low ESR polytantalum capacitors (POSCAP)
are a good choice for both the transient response and
stability of the regulator. These capacitors have intrinsic
ESR that improves the stability. Ceramic capacitors have
extremely low ESR, and while they are a good choice in
many cases, placing a small series resistance element
will sometimes achieve optimum stability and minimize
ringing. In all cases, a minimum of 10µF is required while
the maximum ESR allowable is 3Ω.
The place where ESR is most helpful with ceramics is
low output voltage. At low output voltages, below 2.5V,
some ESR helps the stability when ceramic output capaci-
tors are used. Also, some ESR allows a smaller capaci-
tor value to be used. When small signal ringing occurs
with ceramics due to insufficient ESR, adding ESR or
increas-ing the capacitor value improves the stability and
reduces the ringing. Table 1 gives some recommended
values of ESR to minimize ringing caused by fast, hard
current transitions.
V
IN
IN
LT1963A
GND
OUT
ADJ
Figure 2. Adjustable Operation
R2
1963A F02
R1
+
V
OUT
I
OUTPUT RANGE = 1.21V TO 20V
V
V
ADJ
OUT
ADJ
= 3µA AT 25°C
=1.21V
=1.21V 1+
R2
R1
 + I
(
ADJ
)
1963afe
( )
R2

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