LP3982IMMX-ADJ National Semiconductor, LP3982IMMX-ADJ Datasheet - Page 9

• Manufacturer Part Number: LP3982IMMX-ADJ
• Description: IC REG ULDO 300MA ADJ 8-MSOP
• Manufacturer: National Semiconductor

Specifications of LP3982IMMX-ADJ

• Regulator Topology: Positive Adjustable
• Voltage - Output: 1.25 ~ 6 V
• Voltage - Input: 2.5 ~ 6 V
• Voltage - Dropout (typical): 0.12V @ 300mA
• Number Of Regulators: 1
• Current - Output: 300mA (Min)
• Current - Limit (min): 330mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: LP3982IMMX-ADJTR

Application Information
The delay time for the application of Figure 5 is set as
follows:
The application is set for a reset delay time of 8.8ms. Note
that the comparator should have high impedance inputs so
as to not load down the V
SHUTDOWN
The LP3982 goes into sleep mode when the SHDN pin is in
a logic low condition. During this condition, the pass transis-
tor, error amplifier, and bandgap are turned off, reducing the
supply current to 1nA typical. The maximum guaranteed
voltage for a logic low at the SHDN pin is 0.4V. A minimum
guaranteed voltage of 2V at the SHDN pin will turn the
LP3982 back on. The SHDN pin may be directly tied to V
keep the part on. The SHDN pin may exceed V
ABS MAX of 6.5V.
Figure 6 shows an application that uses the SHDN pin. It
detects when the battery is too low and disconnects the load
by turning off the regulator. A micropower comparator
(LMC7215) and reference (LM385) are combined with resis-
tors to set the minimum battery voltage. At the minimum
battery voltage, the comparator output goes low and tuns off
the LP3982 and corresponding load. Hysteresis is added to
the minimum battery threshold to prevent the battery’s re-
covery voltage from falsely indicating an above minimum
condition. When the load is disconnected from the battery, it
automatically increases in terminal voltage because of the
reduced IR drop across its internal resistance. The Minimum
battery detector of figure 6 has a low detection threshold
(V
LT
) of 3.6V that corresponds to the minimum battery volt-
FIGURE 5. Power on Delayed Reset Application
REF
at the CC pin of the LP3982.
(Continued)
IN
but not the
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IN
to
9
age. The upper threshold (V
exceed the recovery voltage of the battery.
Resistor value for V
(The application of figure 6 used a G
The above procedure assumes a rail-to-rail output compara-
tor. Essentially, R
lower threshold, then R
upper threshold. Note that the application requires rail-to-rail
input as well.
The resistor values shown in Figure 6 are the closest prac-
tical to calculated values.
FAST START-UP
The LP3982 provides fast start-up time for better system
efficiency. The start-up speed is maintained when using the
optional noise bypass capacitor. An internal 500µA current
source charges the capacitor until it reaches about 90% of its
final value.
FIGURE 6. Minimum Battery Detector that Disconnects
the Load Via the SHDN Pin of the LP3982
2
is in parallel with R
UT
and V
2
becomes parallel with R
LT
UT
) is set for 4.6V in order to
are determined as follows:
T
1
of 5µ mho)
prior to reaching the
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for the
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