MAX16060ATE+T Maxim Integrated Products, MAX16060ATE+T Datasheet - Page 9

• Manufacturer Part Number: MAX16060ATE+T
• Description: IC UP SUPERVISOR QUAD 16-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Multi-Voltage Supervisorr

Specifications of MAX16060ATE+T

• Number Of Voltages Monitored: 4
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: 140 ms/Adjustable Minimum
• Voltage - Threshold: 1.8V, 2.5V, 3.3V, Adj
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
—
1
2
3
4
5
6
7
8
9
MARGIN
RESET
NAME
OUT5
OUT6
OUT7
OUT8
OUT4
OUT3
OUT2
OUT1
GND
WDI
V
SRT
TOL
IN5
IN6
IN7
IN8
MR
IN1
IN2
IN3
IN4
EP
CC
Monitored Input Voltage 5. See Table 1 for the input voltage threshold.
Monitored Input Voltage 6. See Table 1 for the input voltage threshold.
Monitored Input Voltage 7. See Table 1 for the input voltage threshold.
Monitored Input Voltage 8. See Table 1 for the input voltage threshold.
Watchdog Timer Input. If WDI remains low or high for longer than the watchdog timeout period, RESET is
asserted and the timer is cleared. The timer also clears whenever a reset is asserted or a rising or falling edge on
WDI is detected. The watchdog timer enters a startup period that allows 54s for the first transition to occur before
a reset. Leave WDI unconnected to disable the watchdog timer. The WDI unconnected state detector uses a
small 400nA current. Therefore, do not connect WDI to anything that will source or sink more than 200nA. Note
that the leakage current specification for most three-state drivers exceeds 200nA.
Ground
Unmonitored Power-Supply Input
Output 5. When the voltage at IN5 falls below its threshold, OUT5 goes low and stays low until the voltage at IN5
exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 6. When the voltage at IN6 falls below its threshold, OUT6 goes low and stays low until the voltage at IN6
exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 7. When the voltage at IN7 falls below its threshold, OUT7 goes low and stays low until the voltage at IN7
exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 8. When the voltage at IN8 falls below its threshold, OUT8 goes low and stays low until the voltage at IN8
exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for the reset timeout period
after MR is deasserted. MR is pulled up to V
Set Reset Timeout Input. Connect a capacitor from SRT to GND to set the reset timeout period. The reset timeout
period can be calculated as follows:
Reset Ti m eout ( s) = 2.06 x 10
Margin Disable Input. Pull MARGIN low to deassert all outputs (go into high state), regardless of the voltage at
any monitored input.
Output 4. When the voltage at IN4 falls below its threshold, OUT4 goes low and stays low until the voltage at IN4
exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 3. When the voltage at IN3 falls below its threshold, OUT3 goes low and stays low until the voltage at IN3
exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 2. When the voltage at IN2 falls below its threshold, OUT2 goes low and stays low until the voltage at IN2
exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 1. When the voltage at IN1 falls below its threshold, OUT1 goes low and stays low until the voltage at IN1
exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Active-Low Reset Output. RESET asserts low when any of the monitored voltages falls below its respective
threshold or MR is asserted. RESET remains asserted for the reset timeout period after all monitored voltages
exceed their respective thresholds and MR is deasserted. This open-drain output has a 30µA internal pullup.
Monitored Input Voltage 1. See Table 1 for the input voltage threshold.
Monitored Input Voltage 2. See Table 1 for the input voltage threshold.
Monitored Input Voltage 3. See Table 1 for the input voltage threshold.
Monitored Input Voltage 4. See Table 1 for the input voltage threshold.
Threshold Tolerance Input. Connect TOL to GND to select 5% threshold tolerance. Connect TOL to V
10% threshold tolerance.
E xp osed P ad . E P i s i nter nal l y connected to GN D . C onnect E P to the g r ound p l ane to p r ovi d e a l ow ther m al r esi stance
p ath fr om the IC j uncti on to the P C B. D o not use as the el ectr i cal connecti on to GN D .
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
1% Accurate, Quad-/Hex-/Octal-Voltage
6
( Ω) x C
S RT
( F) . For the i nter nal ti m eout p er i od of 140m s ( m i n) , connect S RT to V
CC
through a 20kΩ resistor.
FUNCTION
Pin Description (MAX16062)
µP Supervisors
CC
CC
CC
CC
CC
CC
CC
CC
.
.
.
.
.
.
.
.
CC
to select
C C
.
9