MAX706SCSA Maxim Integrated Products, MAX706SCSA Datasheet - Page 9

• Manufacturer Part Number: MAX706SCSA
• Description: IC MPU SUPERVISORY CIRCUIT 8SOIC
• Manufacturer: Maxim Integrated Products
• Type: Simple Reset/Power-On Resetr

Specifications of MAX706SCSA

• Number Of Voltages Monitored: 1
• Output: Push-Pull, Totem Pole
• Reset: Active Low
• Reset Timeout: 140 ms Minimum
• Voltage - Threshold: 2.93V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

To build an early-warning power-failure circuit, use the
power-fail comparator input (PFI) to monitor the unregu-
lated DC supply voltage (see the Typical Operating
Circuits ). Connect the PFI to a resistive-divider network
such that the voltage at PFI falls below 1.25V just
before the regulator drops out. Use PFO to interrupt the
µP so it can prepare for an orderly power-down.
Regulated and unregulated voltages can be monitored
by simply adjusting the PFI resistive-divider network
values to the appropriate ratio. In addition, the reset
signal can be asserted at voltages other that V
threshold, as shown in Figure 5. Connect PFO to MR to
initiate a reset pulse when the 12V supply drops below
a user-specified threshold (11V in this example) or
when V
The MAX706P/R/S/T, the MAX706AP/AR/AS/AT, and the
MAX708R/S/T provide voltage monitoring at the reset
threshold (2.63V to 3.08V) when powered from either
+3V or +5V. These devices are ideal in portable-instru-
ment applications where power can be supplied from
either a +3V battery or an AC-DC wall adapter that gen-
erates +5V (a +5V supply allows a µP or a microcon-
troller to run faster than a +3V supply). With a +3V
supply, these ICs consume less power, but output drive
capability is reduced, the MR to RESET delay time
increases, and the MR minimum pulse width increases.
The Electrical Characteristics table provides specifica-
tions for operation with both +3V and +5V supplies.
When V
MAX706AR/AS/AT, and MAX708R/S/T RESET output no
longer sinks current; it becomes an open circuit. High-
impedance, CMOS logic inputs can drift to undeter-
mined voltages if left as open circuit. If a pulldown
resistor is added to the RESET pin , as shown in Figure
6, any stray charge or leakage current will flow to
ground, holding RESET low. Resistor value R is not criti-
cal, but it should not load RESET and should be small
enough to pull RESET and the input it is driving to
ground. 100kΩ is suggested for R1.
Hysteresis adds a noise margin to the power-fail com-
parator and prevents repeated triggering of the PFO
when V
Figure 7 shows how to add hysteresis to the power-fail
comparator. Select the ratio of R1 and R2 such that PFI
Ensuring a Valid RESET Output Down to
CC
Operation with +3V and +5V Supplies
IN
Adding Hysteresis to the Power-Fail
CC
is near the power-fail comparator trip point.
falls below the reset threshold.
falls below 1V, the MAX706R/S/T,
Applications Information
_______________________________________________________________________________________
+3V Voltage Monitoring, Low-Cost µP
Comparator
V
CC
CC
= 0V
reset
Figure 7. Adding Hysteresis to the Power-Fail Comparator
Figure 8. Monitoring a Negative Voltage
+3V/+3.3V
Supervisory Circuits
+3V/+3.3V
+3V/+3.3V
PFO
NOTE: V
V
0V
CC
PFO
R2
R1
R1
0V
- 1.25
V
V
H
TRIP
V
0V
= 1.25 (1 + R3 + R2 R1) V
TRIP
IN
=
= 1.25
1.25 - V
IS NEGATIVE.
R3
R2
R1
TO µP
R2
(R1 + R2)
V-
TRIP
R2
R2 × R3
C1*
V
V-
TRIP
PFI
L
PFO
PFI
= 1.25 + R1 1.25 - V
MAX708R/S/T
MAX708R/S/T
V
MAX706_
MAX706_
+3V/+3.3V
L
GND
V
GND
V
V
CC
TRIP
V
CC
IN
R2
V
H
PFO
0V
CC
*OPTIONAL
R3
- 1.25
9