MAX6316LUK46CY+T Maxim Integrated Products, MAX6316LUK46CY+T Datasheet - Page 7
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MAX6316LUK46CY+T
Manufacturer Part Number
MAX6316LUK46CY+T
Description
IC MPU/RESET CIRC 4.63V SOT23-5
Manufacturer
Maxim Integrated Products
Type
Simple Reset/Power-On Resetr
Datasheet
1.MAX6320PUK29CYT.pdf
(14 pages)
Specifications of MAX6316LUK46CY+T
Number Of Voltages Monitored
1
Output
Push-Pull, Totem Pole
Reset
Active Low
Reset Timeout
140 ms Minimum
Voltage - Threshold
4.63V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
SOT-23-5, SC-74A, SOT-25
Monitored Voltage
1 V to 5.5 V
Undervoltage Threshold
4.561 V
Overvoltage Threshold
4.699 V
Output Type
Active Low, Push-Pull
Manual Reset
Resettable
Watchdog
Watchdog
Battery Backup Switching
No Backup
Power-up Reset Delay (typ)
200 ms
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1 V
Supply Current (typ)
10 uA
Maximum Power Dissipation
571 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Power Fail Detection
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX6316M/MAX6318MH/MAX6319MH are designed
to interface with µPs that have bidirectional reset pins,
such as the Motorola 68HC11. Like an open-drain output,
these devices allow the µP or other devices to pull the
bidirectional reset (RESET) low and assert a reset condi-
tion. However, unlike a standard open-drain output, it
includes the commonly specified 4.7kΩ pullup resistor
with a P-channel active pullup in parallel.
This configuration allows the MAX6316M/MAX6318MH/
MAX6319MH to solve a problem associated with µPs
that have bidirectional reset pins in systems where sev-
eral devices connect to RESET (Figure 3). These µPs
can often determine if a reset was asserted by an exter-
nal device (i.e., the supervisor IC) or by the µP itself
(due to a watchdog fault, clock error, or other source),
and then jump to a vector appropriate for the source of
the reset. However, if the µP does assert reset, it does
not retain the information, but must determine the
cause after the reset has occurred.
The following procedure describes how this is done in
the Motorola 68HC11. In all cases of reset, the µP pulls
RESET low for about four external-clock cycles. It then
releases RESET, waits for two external-clock cycles,
then checks RESET’s state. If RESET is still low, the µP
concludes that the source of the reset was external
and, when RESET eventually reaches the high state, it
jumps to the normal reset vector. In this case, stored-
state information is erased and processing begins from
Figure 3. MAX6316M/MAX6318MH/MAX6319MH Supports Additional Devices on the Reset Bus
RESET***
***
**
*
MAX6316M/MAX6318MH
MAX6316M/MAX6319MH
ACTIVE-HIGH PUSH/PULL MAX6318MH/MAX6319MH
MR**
_______________________________________________________________________________________
WDI*
Bidirectional R R E E S S E E T T Output
MAX6318MH
MAX6319MH
CIRCUITRY
MAX6316M
RESET
V
CC
5-Pin µP Supervisory Circuits with
4.7kΩ
Watchdog and Manual Reset
C
IN
RESET
scratch. If, on the other hand, RESET is high after a
delay of two external-clock cycles, the processor
knows that it caused the reset itself and can jump to a
different vector and use stored-state information to
determine what caused the reset.
A problem occurs with faster µPs; two external-clock
cycles are only 500ns at 4MHz. When there are several
devices on the reset line, and only a passive pullup resis-
tor is used, the input capacitance and stray capacitance
can prevent RESET from reaching the logic high state (0.8
✕
be interpreted as external. The µP output stage is guaran-
teed to sink 1.6mA, so the rise time can not be reduced
considerably by decreasing the 4.7kΩ internal pullup
resistance. See Bidirectional Pullup Characteristics in the
Typical Operating Characteristics .
The MAX6316M/MAX6318MH/MAX6319MH overcome
this problem with an active pullup FET in parallel with the
4.7kΩ resistor (Figures 4 and 5). The pullup transistor
holds RESET high until the µP reset I/O or the supervisory
circuit itself forces the line low. Once RESET goes below
V
cating that the next transition for RESET will be low to
high. When RESET is released, the 4.7kΩ resistor pulls
RESET up toward V
but is below (0.85 x V
turns on. Once RESET rises above (0.85 x V
2µs one-shot times out, the active pullup turns off. The
parallel combination of the 4.7kΩ pullup and the
C
PTH
V
STRAY
CC
, a comparator sets the transition edge flip-flop, indi-
) in the time allowed. If this happens, all resets will
RESET
RESET
68HC11
C
IN
C
CC
IN
CC
. Once RESET rises above V
V
), the active P-channel pullup
CC
OTHER DEVICES
CIRCUITRY
RESET
CC
) or the
PTH
7