LTC2919CMS-5#TRPBF Linear Technology, LTC2919CMS-5#TRPBF Datasheet - Page 8
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LTC2919CMS-5#TRPBF
Manufacturer Part Number
LTC2919CMS-5#TRPBF
Description
IC MONITOR PREC 5V 10-MSOP
Manufacturer
Linear Technology
Type
Multi-Voltage Supervisorr
Datasheet
1.LTC2919CMS-5PBF.pdf
(16 pages)
Specifications of LTC2919CMS-5#TRPBF
Number Of Voltages Monitored
3
Output
Open Drain or Open Collector
Reset
Active Low
Reset Timeout
140 ms Minimum
Voltage - Threshold
4.425V, Adj, Adj
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
LTC2919
APPLICATIO S I FOR ATIO
The LTC2919 is a low power, high accuracy triple/dual
supply monitor with two adjustable inputs and an accurate
UVLO that can monitor a third supply. Reset timeout may
be selected with an external capacitor, set to an internally
generated 200ms, or disabled entirely.
The three-state polarity select pin (SEL) chooses one of
three possible polarity combinations for the adjustable
input thresholds, as described in Table 1. An individual
output is released when its corresponding ADJ input is
valid (above threshold if confi gured for positive polarity,
below threshold if confi gured for negative polarity).
Both input voltages (V
V
timeout period before RST is released. The LTC2919 as-
serts the reset output during power-up, power-down and
brownout conditions on any of the voltage inputs.
Power-Up
The LTC2919 uses proprietary low voltage drive circuitry
for the RST, OUT1 and OUT2 pins which holds them low
with V
minate voltages from appearing on the outputs during
power-up.
In applications where the low voltage pull-down capabil-
ity is important, the supply to which the external pull-up
resistor connects should be the same supply which pow-
ers the part. Using the same supply for both ensures that
RST, OUT1 and OUT2 never fl oat above 200mV during
power-up, as the pull-down ability of the pin will then
increase as the required pull-down current to maintain a
logic low increases.
Once V
timer initialization will occur. If the monitored ADJ input is
valid, the corresponding OUT will be released. When both
ADJ1 and ADJ2 are valid, the appropriate timeout delay
will begin, after which RST will be released.
Power-Down
On power-down, once V
or either V
of at least 0.5V guarantees a logic low of 0.15V at RST.
8
CC
above the UVLO threshold for longer than the reset
CC
CC
passes the UVLO threshold, polarity selection and
as low as 200mV. This helps prevent indeter-
ADJ
becomes invalid, RST asserts logic low. V
U
ADJ1
CC
drops below the UVLO threshold
U
and V
ADJ2
W
) must be valid and
U
CC
Shunt Regulator
The LTC2919 contains an internal 6.5V shunt regulator on
the V
To operate the part from a supply higher than 6V, the V
pin must have a current-limiting series resistor, R
the supply. This resistor should be sized according to the
following equation:
where V
maximum of the supply, and I
the user expects to draw from the reference output.
As an example, consider operation from an automobile bat-
tery which might dip as low as 10V or spike to 60V. Assume
that the user will be drawing 100μA from the reference. We
must then pick a resistance between 5.4k and 10.7k.
When the V
it is important that the supply voltage never exceed 6V,
or the shunt regulator may begin to draw large currents.
Some supplies may have a nominal value suffi ciently
close to the shunt regulation voltage to prevent sizing of
the resistor according to the above equation. For such
supplies, a 470Ω series resistor may be used.
Adjust Polarity Selection
The external connection of the SEL pin selects the polarities
of the LTC2919 adjustable inputs. SEL may be connected
to GND, connected to V
normal operation. When left unconnected, the maximum
leakage allowable from the pin is ±5μA. Table 1 shows
the three possible selections of polarity based on SEL
connection.
Table 1. Voltage Threshold Selection
Note: Open = open circuit or driven by a three-state buffer in high impedance
state with leakage current less than 5μA.
V
S(MAX)
CC
Negative Polarity
(+) UV or (–) OV
(+) UV or (–) OV
(–) UV or (+) OV
Positive Polarity
Positive Polarity
ADJ1 INPUT
pin to allow operation from a high voltage supply.
S(MIN)
10mA
CC
– 6.2V
pin is connected to a low impedance supply,
and V
S(MAX)
≤ R
CC
CC
are the operating minimum and
≤
Negative Polarity
Negative Polarity
(+) UV or (–) OV
(–) UV or (+) OV
(–) UV or (+) OV
Positive Polarity
or left unconnected during
V
ADJ2 INPUT
REF
200µA + I
S(MIN)
is the maximum current
– 6.8V
REF
Ground
Open
SEL
V
CC
CC
, to
2919f
CC