AS1712A-AQFT austriamicrosystems, AS1712A-AQFT Datasheet - Page 12

• Manufacturer Part Number: AS1712A-AQFT
• Description: IC OP AMP SHUTDOWN R-R 16-TQFN
• Manufacturer: austriamicrosystems

Specifications of AS1712A-AQFT

• Package / Case: 16-WFQFN Exposed Pad
• Mounting Type: Surface Mount
• Current - Supply: 2.3mA
• Operating Temperature: -40°C ~ 125°C
• Output Type: Rail-to-Rail
• Number Of Circuits: 4
• Current - Output / Channel: 200mA
• Amplifier Type: General Purpose
• Voltage - Supply, Single/dual (±): 2.7 V ~ 5.5 V, ±1.35 V ~ 2.5 V
• Slew Rate: 10 V/µs
• Gain Bandwidth Product: 10MHz
• Current - Input Bias: 50pA
• Voltage - Input Offset: 600µV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -

AS1710/AS1712
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
Driving Capacitive Loads
The AS1710/AS1712 amplifiers have a high tolerance for capacitive loads, and are stable with capacitive loads up to
100pF.
Figure 26
Figure 26. Capacitive-Load Driving Circuit
Note: Resistor R
Power-Up
The AS1710/AS1712 typically settle within 5µs after power-up.
Shutdown
When SHDNN (not included in B versions) is pulled low, supply current drops to 0.5µA (per amplifier, V
amplifiers are disabled, and their outputs are driven to V
down, any pullup resistor on the output causes a current drain from the supply.
Note: Pulling SHDNN high enables the amplifier. In the AS1712 the amplifiers shutdown in pairs.
When exiting shutdown, there is a 6µs delay before the amplifier output becomes active.
Power Supplies and Layout
The AS1710/AS1712 can operate from a single 2.7 to 5.5V supply or from dual ±1.35 to ±2.5V supplies. Good design
improves device performance by decreasing the amount of stray capacitance at the op amp inputs/outputs.
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For single-supply operation, bypass the power supply with a 0.1µF ceramic capacitor.
For dual-supply operation, bypass each supply to ground.
Decrease stray capacitance by placing external components close to the op amp pins, minimizing trace and lead
lengths.
put.
shows a typical non-inverting capacitive-load driving circuit in the unity-gain configuration.
ISO
improves the circuit’s phase margin by isolating the load capacitor from the AS1710/AS1712 out-
–
+
AS1710
Revision 1.04
SS
. Because the outputs are actively driven to V
R
ISO
C
F
DD
SS
= 2.7V), the
in shut-
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