ISL55001IBZ Intersil, ISL55001IBZ Datasheet - Page 9

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ISL55001IBZ

Manufacturer Part Number
ISL55001IBZ
Description
IC OPANP MONO 220MHZ 8-SOIC
Manufacturer
Intersil
Datasheets

Specifications of ISL55001IBZ

Amplifier Type
Voltage Feedback
Number Of Circuits
1
Slew Rate
280 V/µs
Gain Bandwidth Product
70MHz
-3db Bandwidth
220MHz
Current - Input Bias
1.72µA
Voltage - Input Offset
60µV
Current - Supply
9mA
Current - Output / Channel
145mA
Voltage - Supply, Single/dual (±)
4.5 V ~ 30 V, ±2.25 V ~ 15 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Bandwidth
70 MHz
Common Mode Rejection Ratio
90
Current, Input Bias
1.72 μA
Current, Input Offset
0.27 μA
Current, Output
145 mA
Current, Supply
8.3 mA
Number Of Amplifiers
Single
Package Type
SO-8
Resistance, Input
2.75 Megohms
Temperature, Operating, Range
-40 to +85 °C
Voltage, Gain
17 kV/V
Voltage, Input
±15 V
Voltage, Noise
12 nV/sqrt Hz
Voltage, Offset
0.06 mV
Voltage, Output, High
13.5 V
Voltage, Output, Low
-12.8 V
Voltage, Supply
33 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PD
For sinking use Equation 3:
Where:
• V
• V
• I
• V
• R
• I
• n = number of amplifiers (n = 1 for ISL55001)
By setting the two PD
equal to each other, we can solve the output current and
R
Power Supply Bypassing Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance.
Lead lengths should be as short as possible. The power
supply pin must be well bypassed to reduce the risk of
oscillation. For normal single supply operation, where the
V
tantalum capacitor in parallel with a 0.1µF ceramic
LOAD
S
MAX
- pin is connected to the ground plane, a single 4.7µF
SMAX
LOAD
S+
S-
OUT
LOAD
= Negative supply voltage
= Positive supply voltage
=
to avoid the device overheat.
V
= Average output voltage of the application
= Load current
1
(V
= Maximum quiescent supply current
= Load resistance tied to ground
S
+
1kΩ
R
V
1
S
- )
×
MAX
I
SMAX
1kΩ C
R
2
1nF
equations (Equations 1, 2 or 3)
9
+
2
1nF
i
C
=
n
1kΩ
1
R
1
(
A
V
OUTi
FIGURE 25. SALLEN-KEY LOW PASS FILTER
1kΩ
R
+
B
-
V
S
V+
V-
-
1nF
1nF
V
5V
V
5V
)
C
C
×
2
3
5
5
-------------------- -
R
V
LOADi
OUTi
(EQ. 3)
V
ISL55001
OUT
R
1kΩ
7
capacitor from V
capacitor combination should be placed at each supply
pin to ground if split supplies are to be used. In this case,
the V
Printed Circuit Board Layout
For good AC performance, parasitic capacitance should
be kept to minimum. Use of wire wound resistors should
be avoided because of their additional series inductance.
Use of sockets should also be avoided if possible. Sockets
add parasitic inductance and capacitance that can result
in compromised performance. Minimizing parasitic
capacitance at the amplifier's inverting input pin is very
important. The feedback resistor should be placed very
close to the inverting input pin. Strip line design
techniques are recommended for the signal traces.
Application Circuits
Sallen-Key Low Pass Filter
A common and easy to implement filter taking advantage
of the wide bandwidth, low offset and low power
demands of the ISL55001. A derivation of the transfer
function is provided for convenience (see Figure 25).
Sallen-Key High Pass Filter
Again this useful filter benefits from the characteristics of
the ISL55001. The transfer function is very similar to the
low pass so only the results are presented (see
Figure 26).
S
Q
Q
Holp
wo
Holp
wo
- pin becomes the negative supply rail.
=
=
=
=
1 (
4
=
=
RC
2
R
2
K
4
K
S
K
+ to GND will suffice. This same
K
1
)
C
1
K
1
R
R
R
2
2
1
C
C
C
1
2
2
+
1
R
R
1
2
C
C
2
1
+
November 3, 2009
R
R
2
1
FN6200.3
C
C
1
2

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