LMC662CN/NOPB National Semiconductor, LMC662CN/NOPB Datasheet - Page 8

• Manufacturer Part Number: LMC662CN/NOPB
• Description: IC OP AMP DUAL CMOS 8-DIP
• Manufacturer: National Semiconductor
• Type: General Purpose Amplifierr

Specifications of LMC662CN/NOPB

• Amplifier Type: General Purpose
• Number Of Circuits: 2
• Output Type: Rail-to-Rail
• Slew Rate: 1.1 V/µs
• Gain Bandwidth Product: 1.4MHz
• Current - Input Bias: 0.002pA
• Voltage - Input Offset: 1000µV
• Current - Supply: 750µA
• Current - Output / Channel: 40mA
• Voltage - Supply, Single/dual (±): 4.75 V ~ 15.5 V, ±2.38 V ~ 7.75 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Bandwidth: 1.4 MHz
• Channel Separation: 130
• Common Mode Rejection Ratio: 83
• Current, Input Bias: 0.002 pA
• Current, Input Offset: 0.001 pA
• Current, Output: 40 mA
• Current, Supply: 0.75 mA
• Harmonic Distortion: 0.01 %
• Impedance, Thermal: 101 °C/W
• Number Of Amplifiers: Dual
• Package Type: MDIP-8
• Resistance, Input: 1 Teraohms
• Temperature, Operating, Range: 0 to +70 °C
• Voltage, Gain: 2000 V/mV
• Voltage, Input: 4.75 to 15.5 V
• Voltage, Noise: 22 nV/sqrt Hz
• Voltage, Offset: 1 mV
• Voltage, Output, High: 14.63 V
• Voltage, Output, Low: 0.26 V
• Voltage, Supply: 5 V
• Rail/rail I/o Type: Rail to Rail Output
• Number Of Elements: 2
• Unity Gain Bandwidth Product: 1.4MHz
• Input Offset Voltage: 6mV
• Input Bias Current: 2fA
• Single Supply Voltage (typ): 5/9/12/15V
• Dual Supply Voltage (typ): Not RequiredV
• Voltage Gain In Db: 126.02dB
• Power Supply Rejection Ratio: 63dB
• Power Supply Requirement: Single
• Shut Down Feature: No
• Single Supply Voltage (min): 4.75V
• Single Supply Voltage (max): 15.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Technology: CMOS
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 8
• Number Of Channels: 2
• Voltage Gain Db: 126.02 dB
• Common Mode Rejection Ratio (min): 63 dB
• Input Voltage Range (max): 15.5 V
• Input Voltage Range (min): 4.75 V
• Operating Supply Voltage: 5 V, 9 V, 12 V, 15 V
• Supply Current: 1.6 mA at 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device
• Other names: *LMC662CN; *LMC662CN/NOPB; LMC662CN

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Application Hints
Note that these capacitor values are usually significantly
smaller than those given by the older, more conservative
formula:
C
from the circuit board and socket. C
C
Using the smaller capacitors will give much higher band-
width with little degradation of transient response. It may be
necessary in any of the above cases to use a somewhat
larger feedback capacitor to allow for unexpected stray ca-
pacitance, or to tolerate additional phase shifts in the loop, or
excessive capacitive load, or to decrease the noise or band-
width, or simply because the particular circuit implementa-
tion needs more feedback capacitance to be sufficiently
stable. For example, a printed circuit board’s stray capaci-
tance may be larger or smaller than the breadboard’s, so the
actual optimum value for C
estimated using the breadboard. In most cases, the value of
C
computed value.
CAPACITIVE LOAD TOLERANCE
Like many other op amps, the LMC662 may oscillate when
its applied load appears capacitive. The threshold of oscilla-
tion varies both with load and circuit gain. The configuration
most sensitive to oscillation is a unity-gain follower. See the
Typical Performance Characteristics.
The load capacitance interacts with the op amp’s output
resistance to create an additional pole. If this pole frequency
is sufficiently low, it will degrade the op amp’s phase margin
so that the amplifier is no longer stable at low gains. As
shown in Figure 3, the addition of a small resistor (50Ω to
100Ω) in series with the op amp’s output, and a capacitor (5
pF to 10 pF) from inverting input to output pins, returns the
phase margin to a safe value without interfering with lower-
frequency circuit operation. Thus, larger values of capaci-
tance can be tolerated without oscillation. Note that in all
cases, the output will ring heavily when the load capacitance
is near the threshold for oscillation.
S
S
F
consists of the amplifier’s input capacitance plus any stray capacitance
and the feedback resistor.
should be checked on the actual circuit, starting with the
FIGURE 2. General Operational Amplifier Circuit
F
F
may be different from the one
compensates for the pole caused by
(Continued)
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8
Capacitive load driving capability is enhanced by using a pull
up resistor to V
ducting 500 µA or more will significantly improve capacitive
load responses. The value of the pull up resistor must be
determined based on the current sinking capability of the
amplifier with respect to the desired output swing. Open loop
gain of the amplifier can also be affected by the pull up
resistor (see Electrical Characteristics).
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC662, typically less
than 0.04 pA, it is essential to have an excellent layout.
Fortunately, the techniques for obtaining low leakages are
quite simple. First, the user must not ignore the surface
leakage of the PC board, even though it may sometimes
appear acceptably low, because under conditions of high
humidity or dust or contamination, the surface leakage will
be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC662’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs. See Figure
5. To have a significant effect, guard rings should be placed
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of an input. This
would cause a 100 times degradation from the LMC662’s
actual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 10
cause only 0.05 pA of leakage current, or perhaps a minor
(2:1) degradation of the amplifier’s performance. See Fig-
ures 6, 7, 8 for typical connections of guard rings for stan-
FIGURE 3. Rx, Cx Improve Capacitive Load Tolerance
FIGURE 4. Compensating for Large Capacitive Loads
+
with a Pull Up Resistor
Figure 4. Typically a pull up resistor con-
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12
00976305
Ω, which is nor-
11
Ω would