AD622AR Analog Devices Inc, AD622AR Datasheet - Page 2

IC AMP INST LP 18MA 8SOIC

AD622AR

Manufacturer Part Number
AD622AR
Description
IC AMP INST LP 18MA 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD622AR

Slew Rate
1.2 V/µs
Rohs Status
RoHS non-compliant
Amplifier Type
Instrumentation
Number Of Circuits
1
-3db Bandwidth
1MHz
Current - Input Bias
2nA
Voltage - Input Offset
60µV
Current - Supply
900µA
Current - Output / Channel
18mA
Voltage - Supply, Single/dual (±)
±2.6 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
No. Of Amplifiers
1
Bandwidth
1MHz
Supply Current
1.5mA
Amplifier Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Programmable Gain Max
1000
Output Type
-
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD622AR
Manufacturer:
AD
Quantity:
40
Part Number:
AD622AR
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD622ARZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD622
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Pin Configuration............................................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Typical Performance Characteristics ............................................. 6
REVISION HISTORY
8/07—Rev. C to Rev. D
Updated Format..................................................................Universal
Added Thermal Resistance Section ............................................... 5
Added Figure 16................................................................................ 9
Added Large Input Voltages at Large Gains Section.................. 11
Replaced RF Interference Section ................................................ 11
Deleted Grounding Section........................................................... 10
Deleted Figure 16............................................................................ 10
Changes to Ground Returns for Input Bias Currents Section.. 12
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 14
4/99—Rev. B to Rev. C
8/98—Rev. A to Rev. B
2/97—Rev. 0 to Rev. A
1/96—Revision 0: Initial Version
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Rev. D | Page 2 of 16
Theory of Operation .........................................................................9
Gain Selection ................................................................................. 11
Outline Dimensions ....................................................................... 13
Make vs. Buy: A Typical Application Error Budget..................9
Input and Output Offset Voltage.............................................. 11
Reference Terminal .................................................................... 11
Input Protection ......................................................................... 11
RF Interference ........................................................................... 11
Ground Returns for Input Bias Currents ................................ 12
Ordering Guide .......................................................................... 14

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