LT6600IS8-5#PBF Linear Technology, LT6600IS8-5#PBF Datasheet - Page 6

IC AMP DIFF LP FLTR 5MHZ 8-SOIC

LT6600IS8-5#PBF

Manufacturer Part Number
LT6600IS8-5#PBF
Description
IC AMP DIFF LP FLTR 5MHZ 8-SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LT6600IS8-5#PBF

Amplifier Type
Differential
Number Of Circuits
1
Output Type
Differential
Current - Input Bias
30µA
Voltage - Input Offset
8000µV
Current - Supply
30mA
Voltage - Supply, Single/dual (±)
3 V ~ 11 V, ±1.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
No. Of Amplifiers
1
Input Offset Voltage
35mV
Gain Db Max
11.5dB
Bandwidth
5MHz
Supply Voltage Range
3V To 11V
Supply Current
30mA
Amplifier Case Style
SOIC
No. Of Pins
8
Rohs Compliant
Yes
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Package Type
SOIC N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output / Channel
-
-3db Bandwidth
-
Slew Rate
-
Gain Bandwidth Product
-
Lead Free Status / Rohs Status
Compliant

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PIN FUNCTIONS
LT6600-5
IN
plied to either or both input pins through identical external
resistors, R
differential outputs is 806Ω/R
V
for the 2nd Filter Stage. Its value programs the common
mode voltage of the differential output of the fi lter. Pin 2 is a
high impedance input, which can be driven from an external
voltage reference, or Pin 2 can be tied to Pin 7 on the PC
board. Pin 2 should be bypassed with a 0.01μF ceramic
capacitor unless it is connected to a ground plane.
V
3.3V or 5V supply (Pin 6 grounded) a quality 0.1μF ceramic
bypass capacitor is required from the positive supply pin
(Pin 3) to the negative supply pin (Pin 6). The bypass
should be as close as possible to the IC. For dual supply
BLOCK DIAGRAM
6
OCM
+
and V
and IN
(Pin 2): Is the DC Common Mode Reference Voltage
+
(Pins 3, 6): Power Supply Pins. For a single
IN
(Pins 1, 8): Input Pins. Signals can be ap-
. The DC gain from differential inputs to the
V
V
IN
IN
+
IN
R
R
.
IN
IN
8
1
IN
IN
+
+
V
806Ω
806Ω
OCM
OP AMP
+
V
V
MID
OCM
7
2
applications, bypass Pin 3 to ground and Pin 6 to ground
with a quality 0.1μF ceramic capacitor.
OUT
the fi lter differential outputs. Each pin can drive a 100Ω
and/or 50pF load to AC ground.
V
supply, see block diagram. For single supply operation
the V
ceramic capacitor to Pin 6. For dual supply operation,
Pin 7 can be bypassed or connected to a high quality DC
ground. A ground plane should be used. A poor ground
will increase noise and distortion. Pin 7 sets the output
common mode voltage of the 1st stage of the fi lter. It has
a 5.5kΩ impedance, and it can be overridden with an
external low impedance voltage source.
400Ω
400Ω
V
V
MID
+
11k
11k
+
MID
(Pin 7): The V
and OUT
V
V
3
6
+
pin should be bypassed with a quality 0.01μF
+ –
V
400Ω
400Ω
OCM
PROPRIETARY
FILTER STAGE
+
LOWPASS
(Pins 4, 5): Output Pins. Pins 4 and 5 are
MID
OUT
OUT
4
5
pin is internally biased at mid-
+
66005 BD
66005fb

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