LT6600CS8-15#TRPBF Linear Technology, LT6600CS8-15#TRPBF Datasheet - Page 6

IC AMP DIFF LP FLTR 15MHZ 8-SOIC

LT6600CS8-15#TRPBF

Manufacturer Part Number
LT6600CS8-15#TRPBF
Description
IC AMP DIFF LP FLTR 15MHZ 8-SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LT6600CS8-15#TRPBF

Amplifier Type
Differential
Number Of Circuits
1
Output Type
Differential
Current - Input Bias
35µA
Voltage - Input Offset
10000µV
Current - Supply
38mA
Voltage - Supply, Single/dual (±)
3 V ~ 11 V, ±1.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output / Channel
-
-3db Bandwidth
-
Slew Rate
-
Gain Bandwidth Product
-

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PIN FUNCTIONS
LT6600-15
IN
plied to either or both input pins through identical external
resistors, R
differential outputs is 536Ω/R
V
for the 2nd Filter Stage. Its value programs the common
mode voltage of the differential output of the fi lter. Pin 2 is a
high impedance input, which can be driven from an external
voltage reference, or Pin 2 can be tied to Pin 7 on the PC
board. Pin 2 should be bypassed with a 0.01μF ceramic
capacitor unless it is connected to a ground plane.
V
3.3V or 5V supply (Pin 6 grounded) a quality 0.1μF ceramic
bypass capacitor is required from the positive supply pin
(Pin 3) to the negative supply pin (Pin 6). The bypass
should be as close as possible to the IC. For dual supply
BLOCK DIAGRAM
6
OCM
+
and V
and IN
(Pin 2): Is the DC Common Mode Reference Voltage
+
(Pins 3, 6): Power Supply Pins. For a single
IN
(Pins 1, 8): Input Pins. Signals can be ap-
. The DC gain from differential inputs to the
V
V
IN
IN
+
IN
.
R
R
IN
IN
1
8
IN
IN
+
+
V
536Ω
536Ω
OCM
OP AMP
+
V
V
MID
OCM
7
2
applications, bypass Pin 3 to ground and Pin 6 to ground
with a quality 0.1μF ceramic capacitor.
OUT
the fi lter differential outputs. Each pin can drive a 100Ω
and/or 50pF load.
V
supply, see the Block Diagram section. For single supply
operation, the V
ity 0.01μF ceramic capacitor to Pin 6. For dual supply
operation, Pin 7 can be bypassed or connected to a high
quality DC ground. A ground plane should be used. A poor
ground will increase noise and distortion. Pin 7 sets the
output common mode voltage of the 1st stage of the fi lter.
It has a 5.5kΩ impedance, and it can be overridden with
an external low impedance voltage source.
200Ω
200Ω
V
V
MID
+
11k
11k
+
(Pin 7): The V
and OUT
V
V
3
6
+
+ –
V
200Ω
200Ω
OCM
PROPRIETARY
FILTER STAGE
+
LOWPASS
(Pins 4, 5): Output Pins. Pins 4 and 5 are
MID
pin should be bypassed with a qual-
MID
OUT
OUT
4
5
pin is internally biased at mid-
660015 BD
+
660015fb

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