LT1881IS8 Linear Technology, LT1881IS8 Datasheet - Page 14
![IC OPAMP DUAL R-R PICO/IN 8SOIC](/photos/6/62/66297/8-soic_05-08-1610_sml.jpg)
LT1881IS8
Manufacturer Part Number
LT1881IS8
Description
IC OPAMP DUAL R-R PICO/IN 8SOIC
Manufacturer
Linear Technology
Datasheet
1.LT1881AIS8PBF.pdf
(18 pages)
Specifications of LT1881IS8
Amplifier Type
General Purpose
Number Of Circuits
2
Output Type
Rail-to-Rail
Slew Rate
0.4 V/µs
Gain Bandwidth Product
1MHz
Current - Input Bias
150pA
Voltage - Input Offset
30µV
Current - Supply
850µA
Current - Output / Channel
40mA
Voltage - Supply, Single/dual (±)
2.7 V ~ 36 V, ±1.35 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
-3db Bandwidth
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LT1881IS8
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LT1881IS8#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LT1881IS8#TRPBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
LT1881/LT1882
APPLICATIONS INFORMATION
The LT1881 dual and LT1882 quad op amps feature
exceptional input precision with rail-to-rail output swing.
The amplifi ers are similar to the LT1884 and LT1885
devices. The LT1881 and LT1882 offer superior capacitive
load driving capabilities over the LT1884 and LT1885 in low
voltage gain confi gurations. Offset voltages are trimmed to
less than 50μV and input bias currents are less than 200pA
on the “A” grade devices. Obtaining benefi cial advantage of
these precision input characteristics depends upon proper
applications circuit design and board layout.
Preserving Input Precision
Preserving the input voltage accuracy of the LT1881/LT1882
requires that the applications circuit and PC board layout
do not introduce errors comparable to or greater than the
30μV offset. Temperature differentials across the input
connections can generate thermocouple voltages of 10’s
of microvolts. PC board layouts should keep connections
to the amplifi er’s input pins close together and away from
heat dissipating components. Air currents across the board
can also generate temperature differentials.
The extremely low input bias currents, 150pA, allow high
accuracy to be maintained with high impedance sources
and feedback networks. The LT1881/LT1882’s low input
bias currents are obtained by using a cancellation circuit
on-chip. This causes the resulting I
be uncorrelated, as implied by the I
greater than the I
the input resistances in each input lead, as is commonly
recommended with most amplifi ers. The impedance at
either input should be kept as small as possible to minimize
total circuit error.
14
BIAS
. The user should not try to balance
OS
BIAS
specifi cation being
+ and I
BIAS
– to
PC board layout is important to insure that leakage currents
do not corrupt the low I
precision, high impedance circuits, the input pins should
be surrounded by a guard ring of PC board interconnect,
with the guard driven to the same common mode voltage
as the amplifi er inputs.
Input Common Mode Range
The LT1881 and LT1882 outputs are able to swing nearly
to each power supply rail, but the input stage is limited
to operating between V
common mode range will cause the gain to drop to zero;
however, no phase reversal will occur.
Input Protection
The inverting and noninverting input pins of the LT1881
and LT1882 have limited on-chip protection. ESD protection
is provided to prevent damage during handling. The input
transistors have voltage clamping and limiting resistors
to protect against input differentials up to 10V. Short
transients above this level will also be tolerated. If the
input pins can see a sustained differential voltage above
10V, external limiting resistors should be used to prevent
damage to the amplifi er. A 1k resistor in each input lead
will provide protection against a 30V differential voltage.
Capacitive Loads
The LT1881 and LT1882 can drive capacitive loads up to
1000pF in unity-gain. The capacitive load driving increases
as the amplifi er is used in higher gain confi gurations.
Capacitive load driving may be increased by decoupling
the capacitance from the output with a small resistance.
–
+1V and V
BIAS
of the amplifi er. In high
+
–1V. Exceeding this
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