LTC6256IKC#TRMPBF-ES Linear Technology, LTC6256IKC#TRMPBF-ES Datasheet - Page 17

• Manufacturer Part Number: LTC6256IKC#TRMPBF-ES
• Description: IC OPAMP DUAL 6.5MHZ 8-UTDFN
• Manufacturer: Linear Technology

Specifications of LTC6256IKC#TRMPBF-ES

• Amplifier Type: General Purpose
• Number Of Circuits: 2
• Output Type: Rail-to-Rail
• Slew Rate: 1.8 V/µs
• Gain Bandwidth Product: 6.5MHz
• -3db Bandwidth: 4.5MHz
• Current - Input Bias: 5nA
• Voltage - Input Offset: 100µV
• Current - Supply: 65µA
• Current - Output / Channel: 35mA
• Voltage - Supply, Single/dual (±): 1.8 V ~ 5.25 V, ±0.9 V ~ 2.625 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-µTDFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TYPICAL APPLICATIONS
When V
65μA, but the 450μV maximum input offset may appear
across R3 inducing a 4.5mA current in the LED. Some
applications want a guaranteed zero LED current at V
= 0, and this is the purpose of R
current through R5 creating a negative 1.2mV output offset
at R3. This guarantees a zero LED current, but note that the
V
*R
*R
STANDBY SUPPLY CURRENT WITH V
10% TO 90% RISE TIME: 10mA TO 1A, 2μs
PACKAGE DESCRIPTION
IN
2.55 ±0.05
SD
UP
Figure 6: LTC6255 Applied as a LED Current Driver with 2μs
Rise Time
5V
GUARANTEES LED OFF WHEN OP AMP SHDN. OTHERWISE OPTIONAL.
FORCES LED COMPLETELY OFF WHEN V
9.76k
200Ω
R1
1.15 ±0.05
2μs Rise Time Analog 1A Pulsed LED Current Driver
R2
1M**
R
UP
IN
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
is at 0V, the op amp supply current is nominally
0.64 ±0.05
+
–
LTC6255
5V
0mA TO 1A, ADD 2.7μs DELAY
SHDN
220pF
C1
IN
= 0: 65μA R
I
1.37 ±0.05
LED
1.35 REF
51Ω
R4
650μA R
= V
IN
IN
= 0. OTHERWISE OPTIONAL.
• 200mA/V
UP
R
100k*
UP
UP
SD
OPEN
0.45 BSC
. R
INSTALLED
240Ω
Q1
UP
R5
0.70 ±0.05
0.25 ± 0.05
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
forces 5μA reverse
PACKAGE
OUTLINE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
TOP AND BOTTOM OF PACKAGE
Q2
I
LED
(Reference LTC DWG # 05-08-1749 Rev Ø)
8-Lead Plastic UTDFN (2mm ¥ 2mm)
5V
(SEE NOTE 6)
Q3
R3
0.1Ω
100mW
TOP MARK
Q1 TO Q3
MOSFETs
3 2N7000
PIN 1 BAR
LED
OSRAM
LRW5SM
625567 F06
0.125 REF
KC Package
IN
op amp supply current rises from 65μA to a still respectable
650μA in this case due to internal protection circuitry for
the output stage. For reduced current, the LTC6255 can
be shut down, but the output becomes high impedance
and may leak high which will turn on the MOSFETs and
LED hard. Adding pull-down resistor R
LTC6255 output goes low when shutting down.
2.00 ±0.10
LTC6255/LTC6256/LTC6257
Figure 7: Time Domain Response Showing 2μs Rise Time.
Top Waveform Is V
Step Measured at R3, then the 0mA to 1A Step Showing
Extra 2.7μs Delay When Recovering From 0mA
0.55 ±0.05
2.00 ±0.10
0.00 – 0.05
10mA TO 1A
(EXTRA DELAY)
0mA TO 1A
IN
V
R = 0.05
IN
. Middle Waveform Is the 10mA to 1A
0.64 ± 0.10
TYP
R = 0.115
BOTTOM VIEW—EXPOSED PAD
TYP
4
5
1.37 ± 0.10
1.35 REF
SD
ensures that the
625567 F07
0.45 BSC
8
1
(KC8) UTDFN 0107 REVØ
0.40 ± 0.10
0.23 ± 0.05
PIN 1 NOTCH
R = 0.20 OR
0.25 45°
CHAMFER
17
625567fa