MCP6004-I/ST Microchip Technology, MCP6004-I/ST Datasheet - Page 9

• Manufacturer Part Number: MCP6004-I/ST
• Description: IC OPAMP QUAD 1.8V 14TSSOP
• Manufacturer: Microchip Technology

Specifications of MCP6004-I/ST

• Slew Rate: 0.6 V/µs
• Package / Case: 14-TSSOP
• Amplifier Type: General Purpose
• Number Of Circuits: 4
• Output Type: Rail-to-Rail
• Gain Bandwidth Product: 1MHz
• Current - Input Bias: 1pA
• Voltage - Input Offset: 4500µV
• Current - Supply: 100µA
• Current - Output / Channel: 23mA
• Voltage - Supply, Single/dual (±): 1.8 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Channels: 4
• Common Mode Rejection Ratio (min): 60 dB
• Input Offset Voltage: 4.5 mV
• Input Bias Current (max): 19 pA
• Operating Supply Voltage: 3 V, 5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Shutdown: No
• Supply Voltage (max): 6 V
• Supply Voltage (min): 1.8 V
• Technology: CMOS
• Voltage Gain Db: 112 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 4-4 gives recommended R
different capacitive loads and gains. The x-axis is the
normalized load capacitance (C
circuit's noise gain. For non-inverting gains, G
Signal Gain are equal. For inverting gains, G
1+|Signal Gain| (e.g., -1 V/V gives G
FIGURE 4-4:
for Capacitive Loads.
After selecting R
resulting frequency response peaking and step
response overshoot. Modify R
response is reasonable. Bench evaluation and simula-
tions with the MCP6001/2/4 SPICE macro model are
very helpful.
4.4
With this family of operational amplifiers, the power
supply pin (V
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high-frequency performance. It also needs a
bulk capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with other analog parts.
 2004 Microchip Technology Inc.
1000
100
10
1.E-11
Supply Bypass
10p
V
R
DD
DD
L
Normalized Load Capacitance; C
= 100 k
G
G
= 5.0V
N
N
for single-supply) should have a local
ISO
= 1
2
for your circuit, double-check the
1.E-10
100p
Recommended R
L
ISO
/G
1.E-09
N
1n
’s value until the
), where G
N
ISO
= +2 V/V).
L
/G
ISO
values for
N
(F)
N
1.E-08
values
N
and the
10n
10n
is the
N
is
4.5
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
cause 5 pA of current to flow; which is greater than the
MCP6001/2/4 family’s bias current at 25°C (1 pA, typ.).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-5.
FIGURE 4-5:
for Inverting Gain.
1.
2.
Non-inverting Gain and Unity-Gain Buffer:
a.
b.
Inverting Gain and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors):
a.
b.
PCB Surface Leakage
Connect the non-inverting pin (V
input with a wire that does not touch the
PCB surface.
Connect the guard ring to the inverting input
pin (V
common mode input voltage.
Connect the guard ring to the non-inverting
input pin (V
to the same reference voltage as the op
amp (e.g., V
Connect the inverting pin (V
with a wire that does not touch the PCB
surface.
IN
–). This biases the guard ring to the
V
MCP6001/2/4
IN
IN
Guard Ring
DD
+). This biases the guard ring
Example Guard Ring Layout
-
/2 or ground).
12
V
. A 5V difference would
IN
+
IN
DS21733E-page 9
–) to the input
IN
V
SS
+) to the