MC34072DR2G ON Semiconductor, MC34072DR2G Datasheet - Page 8

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MC34072DR2G

Manufacturer Part Number
MC34072DR2G
Description
IC OPAMP DUAL SGL SUPP HS 8SOIC
Manufacturer
ON Semiconductor
Type
General Purpose Amplifierr
Datasheet

Specifications of MC34072DR2G

Amplifier Type
General Purpose
Number Of Circuits
2
Slew Rate
13 V/µs
Gain Bandwidth Product
4.5MHz
Current - Input Bias
100nA
Voltage - Input Offset
1000µV
Current - Supply
1.9mA
Current - Output / Channel
30mA
Voltage - Supply, Single/dual (±)
3 V ~ 44 V, ±1.5 V ~ 22 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Number Of Channels
2
Common Mode Rejection Ratio (min)
70 dB
Input Voltage Range (max)
Positive Rail - 1.8 V
Input Voltage Range (min)
Negative Rail
Input Offset Voltage
5 mV
Input Bias Current (max)
500 nA
Operating Supply Voltage
44 V
Supply Current
3.8 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Dual Supply Voltage
+/- 3 V, +/- 5 V, +/- 9 V
Maximum Dual Supply Voltage
+/- 22 V
Minimum Dual Supply Voltage
+/- 1.5 V
Mounting Style
SMD/SMT
Shutdown
No
Supply Voltage (max)
44 V
Supply Voltage (min)
3 V
Technology
Bipolar
Voltage Gain Db
100 dB
Rail/rail I/o Type
No
Number Of Elements
2
Unity Gain Bandwidth Product
4.5MHz
Common Mode Rejection Ratio
70dB
Input Bias Current
500nA
Single Supply Voltage (typ)
5/9/12/15/18/24/28V
Voltage Gain In Db
100dB
Power Supply Rejection Ratio
70dB
Power Supply Requirement
Single/Dual
Shut Down Feature
No
Single Supply Voltage (min)
3V
Single Supply Voltage (max)
44V
Dual Supply Voltage (min)
±1.5V
Dual Supply Voltage (max)
±22V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
8
Package Type
SOIC N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
-3db Bandwidth
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MC34072DR2GOS
MC34072DR2GOS
MC34072DR2GOSTR

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100
8.0
6.0
4.0
2.0
8.0
4.0
80
60
40
20
14
10
16
12
12
0
0
0
-55
10
10
Figure 24. Gain Margin versus Load Capacitance
V
V
R
V
T
Figure 26. Gain Margin versus Temperature
A
CC
EE
L
O
= 2.0 k
= 25°C
V
A
R
V
= -10 V to +10 V
V
Figure 22. Percent Overshoot versus
= -15 V
= +15 V
EE
V
O
-25
L
CC
= +1.0
= 2.0 k to ∞
= -10 V to +10 V
= -15 V
= +15 V
C
L
= 1,000 pF
T
A
C
C
, AMBIENT TEMPERATURE (°C)
0
L
L
Load Capacitance
100
, LOAD CAPACITANCE (pF)
, LOAD CAPACITANCE (pF)
100
25
50
C
L
C
= 100 pF
L
1.0 k
1.0 k
= 10,000 pF
C
L
V
V
A
R
V
T
= 10 pF
75
A
CC
EE
V
O
L
= 25°C
= +1.0
= 2.0 k to ∞
= -10 V to +10 V
= +15 V
= -15 V
100
http://onsemi.com
10 k
10 k
125
8
8.0
6.0
4.0
2.0
12
10
70
60
50
40
30
20
10
80
20
60
40
0
0
0
1.0
-55
10
Figure 27. Phase Margin and Gain Margin
Figure 25. Phase Margin versus Temperature
V
V
R
A
V
T
V
A
CC
EE
T
O
versus Differential Source Resistance
= 25°C
= R
= +100
= 0 V
R
R
= -15 V
= +15 V
R
2
Figure 23. Phase Margin versus
-25
1
T
1
, DIFFERENTIAL SOURCE RESISTANCE (W)
+ R
10
-
+
C
2
L
T
= 100 pF
A
V
Load Capacitance
C
, AMBIENT TEMPERATURE (°C)
O
0
L
100
, LOAD CAPACITANCE (pF)
100
C
25
C
L
L
= 10 pF
= 1,000 pF
Gain
1.0 k
C
L
50
= 10,000 pF
Phase
1.0 k
V
V
A
R
V
V
V
A
R
V
T
75
V
V
A
CC
EE
L
O
CC
EE
O
L
10 k
= +1.0
= 2.0 k to
= 25°C
= +1.0
= 2.0 k to
= -10 V to +10 V
= -10 V to +10 V
= -15 V
= -15 V
= +15 V
= +15 V
100
R
100 k
70
60
50
40
30
20
10
0
10 k
125

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