AD8057ARZ Analog Devices Inc, AD8057ARZ Datasheet - Page 13

• Manufacturer Part Number: AD8057ARZ
• Description: IC OPAMP VF LN LP LDIST 8SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD8057ARZ

• Slew Rate: 1150 V/µs
• Amplifier Type: Voltage Feedback
• Number Of Circuits: 1
• -3db Bandwidth: 325MHz
• Current - Input Bias: 500nA
• Voltage - Input Offset: 1000µV
• Current - Supply: 6mA
• Voltage - Supply, Single/dual (±): 3 V ~ 12 V, ±1.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Op Amp Type: Voltage Feedback
• No. Of Amplifiers: 1
• Bandwidth: 325MHz
• Supply Voltage Range: 3V To 12V
• Amplifier Case Style: SOIC
• No. Of Pins: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• Current - Output / Channel: -
• Gain Bandwidth Product: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

APPLICATIONS INFORMATION
DRIVING CAPACITIVE LOADS
When driving a capacitive load, most op amps exhibit overshoot in
their pulse response. Figure 43 shows the relationship between
the capacitive load that results in 30% overshoot and the closed-
loop gain of an AD8058. It can be seen that, under the gain = +2
condition, the device is stable with capacitive loads of up to 69 pF.
In general, to minimize peaking or to ensure device stability for
larger values of capacitive loads, a small series resistor (R
be added between the op amp output and the load capacitor
(C
For the setup shown in Figure 44, the relationship between R
and C
L
) as shown in Figure 44.
V
IN
L
500
400
300
200
100
= 200mV p-p
was empirically derived and is shown in Table 4.
0
1
Figure 43. Capacitive Load Drive vs. Closed-Loop Gain
R
G
Figure 44. Capacitive Load Drive Circuit
2
R
S
AD8058
= 2.4Ω
CLOSED-LOOP GAIN
R
+2.5V
–2.5V
S
= 0Ω
0.1µF
0.1µF
3
R
10µF
F
10µF
R
4
S
FET PROBE
C
L
V
OUT
S
5
) can
Rev. C | Page 13 of 16
S
Table 4. Recommended Value for Resistors R
Capacitive Load, C
Gain
1
2
3
4
5
10
VIDEO FILTER
Some composite video signals that are derived from a digital
source contain some clock feedthrough that can cause problems
with downstream circuitry. This clock feedthrough is usually at
27 MHz, which is a standard clock frequency for both NTSC
and PAL video systems. A filter that passes the video band and
rejects frequencies at 27 MHz can be used to remove these fre-
quencies from the video signal.
Figure 46 shows a circuit that uses an AD8057 to create a single
5 V supply, 3-pole Sallen-Key filter. This circuit uses a single RC
pole in front of a standard 2-pole active section. To shift the dc
operating point to midsupply, ac coupling is provided by R4, R5,
and C4.
Figure 45. Typical Pulse Response with C
200Ω
R1
–100mV
–200mV
200mV
100mV
R
100 Ω
100 Ω
100 Ω
100 Ω
100 Ω
100 Ω
C1
100pF
499Ω
R2
F
100mV/DIV
49.9Ω
R3
Figure 46. Low-Pass Filter for Video
R
100 Ω
50 Ω
33.2 Ω
25 Ω
11 Ω
L
, Which Results in 30% Overshoot
G
C3
36pF
0.1µF
C4
+5V
C
11 pF
51 pF
104 pF
186 pF
245 pF
870 pF
50ns/DIV
L
R4
10kΩ
R5
10kΩ
(R
S
L
= 65 pF, Gain = +2, and V
= 0 Ω)
2
3
680pF
AD8057/AD8058
C2
AD8057
+5V
7
4
+OVERSHOOT
29.0%
1kΩ
0.1µF
S
C
13 pF
69 pF
153 pF
270 pF
500 pF
1580 pF
R
, R
F
6
L
(R
F
, R
S
= 2.4 Ω)
+
10µF
G
vs.
S
= ±2.5