MCP6S92-E/SN Microchip Technology, MCP6S92-E/SN Datasheet - Page 5

• Manufacturer Part Number: MCP6S92-E/SN
• Description: IC PGA 2CH R-R I/O SPI 8SOIC
• Manufacturer: Microchip Technology

Specifications of MCP6S92-E/SN

• Package / Case: 8-SOIC (3.9mm Width)
• Amplifier Type: Programmable Gain
• Number Of Circuits: 2
• Output Type: Rail-to-Rail
• Slew Rate: 22 V/µs
• -3db Bandwidth: 18MHz
• Current - Input Bias: 1pA
• Voltage - Input Offset: 400µV
• Current - Supply: 1mA
• Current - Output / Channel: 25mA
• Voltage - Supply, Single/dual (±): 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Channels: 1
• Available Set Gain: 30.1 dB (Typ)
• Input Offset Voltage: 4 mV @ 5.5 V
• Input Bias Current (max): 0.000001 uA (Typ) @ 5.5 V
• Operating Supply Voltage: 3 V or 5 V
• Supply Current: 1.6 mA @ 5.5V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP6SX2DM-PCTLPD - BOARD DAUGHTER PICTAIL MCP6SX2
• Gain Bandwidth Product: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

DIGITAL CHARACTERISTICS
 2004 Microchip Technology Inc.
Electrical Specifications: Unless otherwise indicated, T
Input = CH0 = (0.3V)/G, CH1 = 0.3V, R
SPI Inputs (CS, SI, SCK)
Logic Threshold, Low
Input Leakage Current
Logic Threshold, High
Amplifier Output Leakage Current
SPI Output (SO, for MCP6S93)
Logic Threshold, Low
Logic Threshold, High
SPI Timing
Pin Capacitance
Input Rise/Fall Times (CS, SI, SCK)
Output Rise/Fall Times (SO)
CS High Time
SCK Edge to CS Fall Setup Time
CS Fall to First SCK Edge Setup Time
SCK Frequency
SCK High Time
SCK Low Time
SCK Last Edge to CS Rise Setup Time
CS Rise to SCK Edge Setup Time
SI Setup Time
SI Hold Time
SCK to SO Valid Propagation Delay
CS Rise to SO Forced to Zero
Channel and Gain Select Timing
Channel Select Time
Gain Select Time
Shutdown Mode Timing
Out of Shutdown mode (CS goes high)
to Amplifier Output Turn-on Time
Into Shutdown mode (CS goes high) to
Amplifier Output High-Z Turn-off Time
Note 1:
2:
Not tested in production. Set by design and characterization.
When using the device in the daisy-chain configuration, maximum clock frequency is determined by a combination of
propagation delay time (t
fall times of 5 ns. Maximum f
Parameters
DO
L
= 10 k to V
SCK
V
V
80 ns), data input set-up time (t
Sym
OH_DIG
t
t
OL_DIG
C
t
t
CSSC
f
SCCS
t
t
t
t
V
t
t
t
t
t
V
RFO
CSH
CS0
SCK
t
CS1
t
SOZ
OFF
—
RFI
t
I
SU
HD
DO
CH
t
ON
LO
PIN
HI
IL
is therefore
G
IH
IL
DD
V
0.7 V
DD
/2, C
-1.0
-1.0
V
Min
100
40
10
40
40
40
30
40
10
A
—
—
—
—
—
—
—
—
—
—
0
SS
– 0.5
= 25°C, V
DD
5.8 MHz.
L
= 60 pF, SI and SCK are tied low and CS is tied high.
Typ
1.5
3.5
1.5
10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
5
1
DD
= +2.5V to +5.5V, V
SU
V
0.3V
SS
+1.0
Max
V
V
1.0
10
80
80
10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DD
DD
2
40 ns), SCK high time (t
+0.4
DD
Units
MHz
µA
µA
pF
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
V
V
V
V
SS
MCP6S91/2/3
In Shutdown mode
I
I
All digital I/O pins
(Note 1)
MCP6S93
SCK edge when CS is high
V
SCK edge when CS is high
MCP6S93
MCP6S93
CHx = 0.6V, CHy = 0.3V, G = 1,
CHx to CHy select,
CHx = CHy = 0.3V,
G = 5 to G = 1 select,
CS = 0.7 V
CS = 0.7 V
CS = 0.7 V
OL
OH
CS = 0.7 V
= GND, V
DD
= 2.1 mA, V
= -400 µA
= 5V (Note 2)
HI
DD
DD
DD
REF
DD
Conditions
40 ns) and SCK rise and
to V
to V
to V
to V
= V
DD
OUT
OUT
OUT
= 5V
OUT
SS
DS21908A-page 5
, G = +1 V/V,
90% point
90% point
90% point
90% point