MAX4246AKA+T Maxim Integrated Products, MAX4246AKA+T Datasheet - Page 7

IC OP AMP LOW POWER SOT23-8

MAX4246AKA+T

Manufacturer Part Number
MAX4246AKA+T
Description
IC OP AMP LOW POWER SOT23-8
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX4246AKA+T

Amplifier Type
General Purpose
Number Of Circuits
2
Output Type
Rail-to-Rail
Slew Rate
0.4 V/µs
Gain Bandwidth Product
1MHz
Current - Input Bias
10nA
Voltage - Input Offset
400µV
Current - Supply
375µA
Current - Output / Channel
30mA
Voltage - Supply, Single/dual (±)
2.5 V ~ 5.5 V, ±1.25 V ~ 2.75 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
SOT-23-8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Other names
MAX4246AKA+T
MAX4246AKA+TTR
Figure 1a. Minimizing Offset Error Due to Input Bias Current
(Noninverting)
The MAX4245/MAX4246/MAX4247 have rail-to-rail input
and output stages that are specifically designed for
low-voltage, single-supply operation. The input stage
consists of composite NPN and PNP differential stages,
which operate together to provide a common-mode
range extending to both supply rails. The crossover
region of these two pairs occurs halfway between V
and V
Low-operating supply voltage, low supply current and
rail-to-rail outputs make this family of operational ampli-
fiers an excellent choice for precision or general-pur-
pose, low-voltage, battery-powered systems.
Since the input stage consists of NPN and PNP pairs,
the input bias current changes polarity as the common-
MAX4245
SS
1
2
3
4
5
6
. The input offset voltage is typically ±400µV.
IN
R3 = R1 R2
MAX4246
Single-/Dual-Supply, Low-Power Op Amps
Ultra-Small, Rail-to-Rail I/O with Disable,
_______________________________________________________________________________________
PIN
4
8
1
2
3
5
6
7
R3
R1
Detailed Description
Rail-to-Rail Input Stage
MAX4247
R2
10
V
4
1
2
3
7
8
9
5
6
DD
SHDNA
SHDNB
NAME
SHDN
OUTA
OUTB
INA+
INB+
OUT
INA-
INB-
V
V
IN+
IN-
DD
SS
DD
Noninverting Input
Ground or Negative Supply
Inverting Input
Amplifier Output
Shutdown
Positive Supply
Amplifier Output Channel A
Inverting Input Channel A
Noninverting Input Channel A
Noninverting Input Channel B
Inverting Input Channel B
Amplifier Output Channel B
Shutdown Channel A
Shutdown Channel B
mode voltage passes through the crossover region.
Match the effective impedance seen by each input to
reduce the offset error caused by input bias currents
flowing through external source impedance (Figures 1a
and 1b).
The combination of high-source impedance plus input
capacitance (amplifier input capacitance plus stray
capacitance) creates a parasitic pole that can produce
an underdamped signal response. Reducing input
capacitance or placing a small capacitor across the
feedback resistor improves response in this case.
The MAX4245/MAX4246/MAX4247 family’s inputs are
protected from large differential input voltages by inter-
nal 5.3k
stacks across the inputs (Figure 2). For differential-
input voltages much less than 2.1V (triple-diode drop),
Figure 1b. Minimizing Offset Error Due to Input Bias Current
(Inverting)
series resistors and back-to-back triple-diode
R3 = R1 R2
IN
FUNCTION
R3
R1
Pin Description
R2
V
DD
7

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