LMH6503MT/NOPB National Semiconductor, LMH6503MT/NOPB Datasheet - Page 4

• Manufacturer Part Number: LMH6503MT/NOPB
• Description: IC AMP VAR GAIN LOW PWR 14TSSOP
• Manufacturer: National Semiconductor
• Series: LMH®r

Specifications of LMH6503MT/NOPB

• Amplifier Type: Variable Gain
• Number Of Circuits: 1
• Slew Rate: 1800 V/µs
• -3db Bandwidth: 135MHz
• Current - Input Bias: 11µA
• Current - Supply: 37mA
• Current - Output / Channel: 90mA
• Voltage - Supply, Single/dual (±): 5 V ~ 12 V, ±2.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• For Use With: CLC730033 - EVAL BOARD AMP FOR 14-SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• Gain Bandwidth Product: -
• Voltage - Input Offset: -
• Other names: *LMH6503MT; *LMH6503MT/NOPB; LMH6503MT

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Electrical Characteristics
14-Pin TSSOP
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables.
Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of
the device such that T
Note 3: The maximum output current (I
Note 4: Human body model: 1.5kΩ in series with 100pF. Machine model: 0Ω in series with 200pF.
Note 5: Slew Rate is the average of the rising and falling rates.
Note 6: Typical values represent the most likely parametric norm. Bold numbers refer to over temperature limits.
Note 7: Positive current correspondes to current flowing in the device.
Note 8: Drift determined by dividing the change in parameter distribution at temperature extremes by the total temperature change.
Note 9: CMRR definition: [|∆V
Note 10: +PSRR definition: [|∆V
offset shift subtracted out.
Note 11: Gain Control Frequency Response Schematic:
Note 12: Gain/Phase normalized to low frequency value at each A
Note 13: Flat Band Attenuation (Relative To Max Gain) Range Definition: Specified as the attenuation range from maximum which allows gain flatness specified
(either
Connection Diagram
Ordering Information
±
±
14-pin SOIC
0.2dB:
0.1dB:
Package
±
0.2dB or
10V/V down to 1V/V=20dB range
10V/V down to 4.7V/V=6.5dB range
±
0.1dB), relative to A
J
= T
A
. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where T
LMH6503MAX
LMH6503MTX
Part Number
LMH6503MA
LMH6503MT
OUT
OUT
/∆V
/∆V
CM
VMAX
OUT
+
|/A
| /A
V
) is determined by device power dissipation limitations or value specified, whichever is lower.
V
] with 0.1V differential input voltage. ∆V
gain. For example, for f
], -PSRR definition: [|∆V
(Note 2) (Continued)
Package Marking
LMH6503MA
LMH6503MT
V
14-Pin SOIC/TSSOP
.
<
OUT
30MHz, here are the Flat Band Attenuation ranges:
/∆V
Top View
−
| /A
4
V
] with 0.1V differential input voltage. ∆V
OUT
is the change in output voltage with offset shift subtracted out.
20073946
2.5k Units Tape and Reel
2.5k Units Tape and Reel
Transport Media
20073932
55 Units/Rail
94 Units/Rail
OUT
is the change in output voltage with
NSC Drawing
MTC14
M14A
J
>
T
A
.