AD8369ARUZ Analog Devices Inc, AD8369ARUZ Datasheet - Page 2

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AD8369ARUZ

Manufacturer Part Number
AD8369ARUZ
Description
IC AMP VGA 16TSSOP
Manufacturer
Analog Devices Inc
Series
X-AMP®r
Datasheet

Specifications of AD8369ARUZ

Amplifier Type
Variable Gain
Number Of Circuits
1
Slew Rate
1200 V/µs
-3db Bandwidth
600MHz
Current - Input Bias
160µA
Current - Supply
37mA
Voltage - Supply, Single/dual (±)
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
No. Of Amplifiers
1
Bandwidth
380MHz
Gain Accuracy
0.05dB
No. Of Channels
1
Supply Voltage Range
3V To 5.5V
Amplifier Case Style
TSSOP
No. Of Pins
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
Current - Output / Channel
-
Gain Bandwidth Product
-
Voltage - Input Offset
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD8369–SPECIFICATIONS
Parameter
OVERALL FUNCTION
GAIN CONTROL INTERFACE
INPUT STAGE
OUTPUT STAGE
POWER INTERFACE
POWER UP INTERFACE
DIGITAL INTERFACE
Frequency = 10 MHz
*The low frequency high-pass corner is determined by the capacitor on pin FILT, C
Frequency Range
Voltage Gain Span
Maximum Gain
Minimum Gain
Gain Step Size
Gain Step Accuracy
Gain Step Response Time
Input Resistance
Input Capacitance
Input Noise Spectral Density
Input Common-Mode DC Voltage Measured at pin CMDC
Maximum Linear Input
Output Resistance
Output Capacitance
Common-Mode DC Voltage
Slew Rate
Supply Voltage
Quiescent Current
Disable Current
Enable Threshold
Disable Threshold
Response Time
Input Bias Current
Low Condition
High Condition
Input Bias Current
Voltage Gain
Gain Flatness
Noise Figure
Output IP3
IMD
Harmonic Distortion
P1dB
vs. Temperature
vs. Temperature
3
Conditions
3 dB Bandwidth
All bits high (1 1 1 1)
All bits low (0 0 0 0)
Over entire gain range, with respect to 3 dB step
Step = 3 dB, settling to 10% of final value
From INHI to INLO
From INHI to COMM, from INLO to COMM
From INHI to INLO
From INHI to COMM, from INLO to COMM
|V
From OPHI to OPLO
From OPHI to COMM, from OPLO to COMM
From OPHI to OPLO
From OPHI to COMM, from OPLO to COMM
No input signal
Output step = 1 V
PWUP high
–40∞C £ T
PWUP low
–40∞C £ T
Pin PWUP
Time delay following low to high transition
on PWUP until output settles to within 10%
of final value
PWUP = 5 V
Pins SENB, BIT0, BIT1, BIT2, BIT3,
and DENB
Low input
Within ± 10 MHz of 10 MHz
f1 = 9.945 MHz, f2 = 10.550 MHz
f1 = 9.945 MHz, f2 = 10.550 MHz
V
Second-Order, V
Third-Order, V
For ± 1 dB deviation from linear gain
OPHI
INHI
– V
– V
OPLO
A
A
INLO
£ 85∞C
£ 85∞C
= 1 V p-p composite
| at Minimum Gain
OPHI
(V
unless otherwise noted.)
OPHI
S
= 5 V, T = 25 C, R
– V
– V
OPLO
OPLO
–2–
= 1 V p-p
= 1 V p-p
FILT
. See the Theory of Operation section for details.
S
= 200
, R
Min
LF*
3.0
2.2
3.0
L
= 1000
, Frequency = 70 MHz, at maximum gain,
Typ
45
40
–5
3
± 0.05
30
200
100
0.1
1.1
2
1.7
2.2
200
100
0.25
1.5
V
1200
37
400
7
160
150
40.5
+0.05*
7.0
+22
+22
–74
–72
–71
+3
+3
S
/2
Max
600
5.5
42
52
750
1
1.0
2.0
dB
V
dBm
dBm
Unit
MHz
dB
dB
dB
dB
ns
W
W
pF
pF
nV/÷Hz
V
W
W
pF
pF
V
V/ms
V
mA
mA
mA
mA
V
V
ms
mA
V
V
mA
dB
dB
dB
dBV rms
dBc
dBc
dBc
dBV rms
REV. 0

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