MCP6V07-E/SN Microchip Technology, MCP6V07-E/SN Datasheet - Page 16

• Manufacturer Part Number: MCP6V07-E/SN
• Description: IC OPAMP AUTO-ZERO DUAL 8SOIC
• Manufacturer: Microchip Technology

Specifications of MCP6V07-E/SN

• Slew Rate: 0.5 V/µs
• Package / Case: 8-SOIC (3.9mm Width)
• Amplifier Type: Chopper (Zero-Drift)
• Number Of Circuits: 2
• Output Type: Rail-to-Rail
• Gain Bandwidth Product: 1.3MHz
• Current - Input Bias: 6pA
• Voltage - Input Offset: 3µV
• Current - Supply: 300µA
• Current - Output / Channel: 22mA
• Voltage - Supply, Single/dual (±): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Channels: 2
• Common Mode Rejection Ratio (min): 120 dB
• Input Offset Voltage: 0.003 mV
• Input Bias Current (max): 5000 pA
• Operating Supply Voltage: 3 V, 5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Shutdown: No
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Technology: CMOS
• Voltage Gain Db: 158 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP6S21/2/6/8
4.0
The MCP6S21/2/6/8 family of Programmable Gain
Amplifiers (PGA) are based on simple analog building
blocks (see Figure 4-1). Each of these blocks will be
explained in more detail in the following sub-sections.
FIGURE 4-1:
TABLE 4-1:
DS21117A-page 16
Note 1: FPBW is the Full Power Bandwidth. These numbers are based on V
SCK
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
MCP6S21–One input (CH0), no SO pin
MCP6S22–Two inputs (CH0, CH1), V
to V
MCP6S26–Six inputs (CH0 to CH5)
MCP6S28–Eight inputs (CH0 to CH7)
SO
CS
SI
Gain
(V/V)
SS
10
16
32
1
2
4
5
8
2: No changes in DC performance (e.g., V
3: BW is the closed-loop, small signal -3 dB bandwidth.
, no SO pin
ANALOG FUNCTIONS
SPI™
Logic
POR
MUX
V
Compensation
GAIN VS. INTERNAL COMPENSATION CAPACITOR
SS
Capacitor
Internal
Medium
Medium
Medium
Medium
Switches
Large
Large
PGA Block Diagram.
Small
Small
Gain
+
-
V
DD
8
V
REF
REF
R
R
Typical GBWP
tied internally
G
F
(MHz)
12
12
20
20
20
20
64
64
V
OUT
OS
) accompany a change in compensation capacitor.
Typical SR
4.1
The MCP6S21 has one input, the MCP6S22 and
MCP6S25 have two inputs, the MCP6S26 has six
inputs and the MCP6S28 has eight inputs (see
Figure 4-1).
For the lowest input current, float unused inputs. Tying
these pins to a voltage near the used channels also
works well. For simplicity, they can be tied to V
V
The one channel MCP6S21 has the lowest input bias
current, while the eight channel MCP6S28 has the
highest. There is about a 2:1 ratio in I
parts.
4.2
The internal op amp provides the right combination of
bandwidth, accuracy and flexibility.
4.2.1
The internal op amp has three compensation capaci-
tors connected to a switching network. They are
selected to give good small signal bandwidth at high
gains, and good slew rate (full power bandwidth) at low
gains. The change in bandwidth as gain changes is
between 2 MHz and 12 MHz. Refer to Table 4-1 for
more information.
(V/µs)
DD
4.0
4.0
11
11
11
11
22
22
, but the input current may increase.
Input MUX
Internal Op Amp
COMPENSATION CAPACITORS
DD
Typical FPBW
= 5.0V.
(MHz)
0.30
0.30
0.70
0.70
0.70
0.70
1.6
1.6
2003 Microchip Technology Inc.
B
Typical BW
between these
(MHz)
2.4
2.0
2.0
12
10
6
7
5
SS
or