MCP6V06T-E/MNY Microchip Technology, MCP6V06T-E/MNY Datasheet - Page 21

IC OPAMP AUTO-ZERO SGL 8-TDFN

MCP6V06T-E/MNY

Manufacturer Part Number
MCP6V06T-E/MNY
Description
IC OPAMP AUTO-ZERO SGL 8-TDFN
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP6V06T-E/MNY

Slew Rate
0.5 V/µs
Amplifier Type
Chopper (Zero-Drift)
Number Of Circuits
1
Output Type
Rail-to-Rail
Gain Bandwidth Product
1.3MHz
Current - Input Bias
6pA
Voltage - Input Offset
3µV
Current - Supply
300µA
Current - Output / Channel
22mA
Voltage - Supply, Single/dual (±)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-TDFN
Op Amp Type
Precision
No. Of Amplifiers
1
Bandwidth
1.3MHz
Supply Voltage Range
1.8V To 5.5V
Amplifier Case Style
TQFN
No. Of Pins
8
Number Of Channels
1
Voltage Gain Db
158 dB
Common Mode Rejection Ratio (min)
120 dB
Input Offset Voltage
0.003 mV
Operating Supply Voltage
3 V, 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
 Details
Other names
MCP6V06T-E/MNYTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP6V06T-E/MNY
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
MCP6V06T-E/MNY
Manufacturer:
MICROCHIP
Quantity:
12 000
4.0
The MCP6V06/7/8 family of auto-zeroed op amps is
manufactured using Microchip’s state of the art CMOS
process. It is designed for low cost, low power and high
precision applications. Its low supply voltage, low
quiescent current and wide bandwidth makes the
MCP6V06/7/8 ideal for battery-powered applications.
FIGURE 4-1:
4.1.1
The Null Amp. and Main Amp. are designed for high
gain and accuracy using a differential topology. They
have an auxiliary input (bottom left) used for correcting
the offset voltages. Both inputs are added together
internally. The capacitors at the auxiliary inputs (C
and C
operation.
The Output Buffer is designed to drive external loads at
the V
voltage (V
All of these switches are make-before-break in order to
minimize glitch-induced errors. They are driven by two
clock phases (φ
mode and auto-zeroing mode.
The clock is derived from an internal R-C oscillator
running at a rate of f
output is divided down to the desired rate. It is also
randomized to minimize (spread) undesired clock
tones in the output.
© 2008 Microchip Technology Inc.
OUT
H
V
V
) hold the corrected values during normal
IN
IN
APPLICATIONS
pin. It also produces a single ended output
REF
+
BUILDING BLOCKS
is an internal reference voltage).
1
Switches
and φ
Input
Null
C
OSC1
Simplified Auto-zeroed Op Amp Functional Diagram.
H
2
) that select between normal
= 650 kHz. The oscillator’s
Switches
Correct
φ
Amp.
Null
Null
1
φ
2
Switches
Output
C
Null
FW
FW
φ
φ
1
2
Amp.
Main
4.1
Figure 4-1
MCP6V06/7/8 auto-zeroed op amps. This will be used
to explain how the DC voltage errors are reduced in this
architecture.
The internal POR ensures the part starts up in a known
good state. It also provides protection against power
supply brown out events.
The Chip Select input places the op amp in a low power
state when it is high. When it goes low, it powers the op
amp at its normal level and starts operation properly.
The Digital Control circuitry takes care of all of the
housekeeping details of the switching operation. It also
takes care of Chip Select and POR events.
Control
Digital
POR
CS
Overview of Auto-zeroing
Operation
shows a simplified diagram of the
V
NC
REF
MCP6V06/7/8
Randomization
Output
Oscillator
Buffer
Clock
DS22093B-page 21
V
OUT

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