MCP6293-E/P Microchip Technology, MCP6293-E/P Datasheet - Page 13
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MCP6293-E/P
Manufacturer Part Number
MCP6293-E/P
Description
IC OPAMP 2.4V SNGL CS R-R 8DIP
Manufacturer
Microchip Technology
Specifications of MCP6293-E/P
Amplifier Type
General Purpose
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
7 V/µs
Gain Bandwidth Product
10MHz
Current - Input Bias
1pA
Voltage - Input Offset
3000µV
Current - Supply
1mA
Current - Output / Channel
25mA
Voltage - Supply, Single/dual (±)
2.4 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
-3db Bandwidth
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP6293-E/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
4.3
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. A unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, though all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (R
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
FIGURE 4-3:
stabilizes large capacitive loads.
Figure 4-4
different capacitive loads and gains. The x-axis is the
normalized load capacitance (C
circuit's noise gain. For non-inverting gains, G
Signal Gain are equal. For inverting gains, G
1+|Signal Gain| (e.g., -1 V/V gives G
FIGURE 4-4:
for Capacitive Loads.
After selecting R
resulting frequency response peaking and step
response overshoot. Modify R
response is reasonable. Bench evaluation and
simulations with the MCP6291/1R/2/3/4/5 SPICE
macro model are helpful.
© 2007 Microchip Technology Inc.
V
IN
100
10
10
Capacitive Loads
MCP629X
+
–
Normalized Load Capacitance; C
gives recommended R
ISO
for your circuit, double-check the
100
Output Resistor, R
Recommended R
ISO
in
G
G
Figure
N
N
R
L
= 1 V/V
≥ 2 V/V
ISO
ISO
/G
1,000
C
N
's value until the
), where G
N
L
4-3) improves the
ISO
= +2 V/V).
L
/G
ISO
N
values for
ISO
(pF)
N
Values
V
10,000
and the
N
OUT
is the
N
is
4.4
The MCP6293 and MCP6295 are single and dual op
amps with Chip Select (CS), respectively. When CS is
pulled high, the supply current drops to 0.7 µA (typical)
and flows through the CS pin to V
happens, the amplifier output is put into a high-imped-
ance state. By pulling CS low, the amplifier is enabled.
The CS pin has an internal 5 MΩ (typical) pull-down
resistor connected to V
is left floating.
supply current response to a CS pulse.
4.5
The MCP6295 is a dual op amp with Chip Select (CS).
The Chip Select input is available on what would be the
non-inverting input of a standard dual op amp (pin 5).
This is available because the output of op amp A
connects to the non-inverting input of op amp B, as
shown in
be connected to a microcontroller I/O line, puts the
device in Low-power mode. Refer to Section 4.4
“MCP629X Chip Select”.
FIGURE 4-5:
The output of op amp A is loaded by the input imped-
ance of op amp B, which is typically 10
specified in the DC specification table (Refer to
Section 4.3 “Capacitive Loads” for further details
regarding capacitive loads).
The common mode input range of these op amps is
specified in the data sheet as V
V
is limited to V
10 kΩ load), the non-inverting input range of op amp B
is limited to the common mode input range of
V
V
V
DD
SS
INA+
INA–
MCP6291/1R/2/3/4/5
+ 20 mV and V
+ 300 mV. However, since the output of op amp A
MCP629X Chip Select
Cascaded Dual Op Amps
(MCP6295)
2
3
Figure
OL
Figure 1-1
A
V
4-5. The Chip Select input, which can
and V
OUTA
DD
1
MCP6295
/V
Cascaded Gain Amplifier.
– 20 mV.
SS
OH
INB+
shows the output voltage and
, so it will go low if the CS pin
CS
(20 mV from the rails with a
5
V
INB–
6
SS
DS21812E-page 13
SS
B
– 300 mV and
13
. When this
Ω||6 pF, as
7
V
OUTB