MCP6231-E/P Microchip Technology, MCP6231-E/P Datasheet - Page 9

• Manufacturer Part Number: MCP6231-E/P
• Description: IC OPAMP 1.8V SNGL R-R 8DIP
• Manufacturer: Microchip Technology

Specifications of MCP6231-E/P

• Slew Rate: 0.15 V/µs
• Package / Case: 8-DIP (0.300", 7.62mm)
• Amplifier Type: General Purpose
• Number Of Circuits: 1
• Output Type: Rail-to-Rail
• Gain Bandwidth Product: 300kHz
• Current - Input Bias: 1pA
• Voltage - Input Offset: 5000µV
• Current - Supply: 20µA
• Current - Output / Channel: 23mA
• Voltage - Supply, Single/dual (±): 1.8 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Number Of Channels: 1
• Common Mode Rejection Ratio (min): 61 dB
• Input Offset Voltage: 5 mV
• Input Bias Current (max): 1 pA
• Operating Supply Voltage: 3 V, 5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: Through Hole
• Shutdown: No
• Supply Voltage (max): 6 V
• Supply Voltage (min): 1.8 V
• Technology: CMOS
• Voltage Gain Db: 110 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.0
4.1
To minimize the effect of input bias current in an ampli-
fier circuit (this is important for very high source-
impedance applications, such as pH meters and tran-
simpedance amplifiers), the impedance at both invert-
ing and non-inverting inputs need to be matched. This
is done by choosing the circuit resistor values so that
the total resistance at each input is the same.
Figure 4-1 shows a summing amplifier circuit.
FIGURE 4-1:
To match the inputs, set all voltage sources to ground
and calculate the total resistance at the input nodes. In
this summing amplifier circuit, the resistance at the
inverting input is calculated by setting V
V
parallel. The total resistance at the inverting input is:
At the non-inverting input, V
source. When V
in parallel. The total resistance at the non-inverting
input is:
To minimize output offset voltage and increase circuit
accuracy, the resistor values need to meet the
conditions:
 2004 Microchip Technology Inc.
OUT
Where:
Where:
V
V
to ground. In this case, R
R
R
IN2
IN1
VIN –
VIN+
APPLICATION CIRCUITS
Matching the impedance at the
inputs
R
R
x
y
V
= total resistance at the inverting input
= total resistance at the inverting
DD
R
R
R
R
DD
VIN-
input
g1
VIN+
g2
is set to ground, both R
R
R
z
=
VIN+
=
Summing Amplifier Circuit.
----------------------------------------- -


--------
R
----------------------- -


1
-----
R
g1
MCP6231
1
=
+
–
x
+
+
1
R
R
--------
R
DD
VIN-
-----
R
1
1
f
1
g2
y
g1


is the only voltage
+
+
, R
---- -
R
R
1
g2
f
z


and R
IN1
x
V
and R
, V
OUT
IN2
f
are in
y
and
are
4.2
In analog circuit design, the PCB or the development
board parasitic capacitance can compromise the circuit
behavior.
FIGURE 4-2:
Capacitance at the Input.
For instance, Figure 4-2 shows a typical scenario. If the
input of an amplifier sees parasitic capacitance of
several picofarad, the frequency response of the circuit
(Figure 4-3) shows that the gain-setting resistors can
introduce a zero with the board parasitic capacitance.
This parasitic introduces gain peaking and can cause
circuit instability.
One solution is to use smaller resistor values to push
the zero to a higher frequency. Another solution is to
compensate gain-peaking by introducing a pole at the
point at which the zero occurs. This can be done by
adding C
needs to be selected so that the ratio C
equal to the ratio of R
enhances the frequency response of the circuit.
FIGURE 4-3:
Response.
V
V
AC
DC
-2
-4
-6
6
4
2
0
1.E+03
1k
Compensating for the parasitic
capacitance
f
in parallel with the feedback resistor (R
C
parasitic
R
g
with C
10k
1.E+04
Frequency (Hz)
f
Effect of Parasitic
Circuit Frequency
without C
f
:R
+
MCP6231
-
g
. Figure 4-3 shows how C
R
C
f
f
f
MCP6231
C
100k
f
1.E+05
=
C
parasitic
C
G
DS21881A-page 9
parasitic
R
R
N
C
g
f
= +6 V/V
= 100 pf
f
= 50 k
= 10 k
= 20 pf
V
parasitic
OUT
1M
1.E+06
R
----- -
R
:C
g
f
f
). C
f
is
f
f