SAK-C167CR-LM HA+ Infineon Technologies, SAK-C167CR-LM HA+ Datasheet - Page 71

IC MCU 16BIT 2KB XRAM 144-MQFP

SAK-C167CR-LM HA+

Manufacturer Part Number
SAK-C167CR-LM HA+
Description
IC MCU 16BIT 2KB XRAM 144-MQFP
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAK-C167CR-LM HA+

Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144- BSQFP
Packages
PG-MQFP-144
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
4.0 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
16
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Other names
SAK-C167CR-LMHAINCT
Direct Drive
When direct drive is configured (CLKCFG = 011
disabled and the CPU clock is directly driven from the internal oscillator with the input
clock signal.
The frequency of
f
f
The timings listed below that refer to TCLs therefore must be calculated using the
minimum TCL that is possible under the respective circumstances. This minimum value
can be calculated via the following formula:
TCL
For two consecutive TCLs the deviation caused by the duty cycle of
so the duration of 2TCL is always 1/
used only once for timings that require an odd number of TCLs (1, 3, …). Timings that
require an even number of TCLs (2, 4, …) may use the formula 2TCL = 1/
Data Sheet
CPU
OSC
.
min
(i.e. the duration of an individual TCL) is defined by the duty cycle of the input clock
= 1/
f
OSC
× DC
f
CPU
min
directly follows the frequency of
(DC = duty cycle)
f
OSC
. The minimum value TCL
69
B
) the on-chip phase locked loop is
f
OSC
so the high and low time of
Electrical Parameters
min
f
OSC
therefore has to be
is compensated
f
OSC
V3.3, 2005-02
C167CR
C167SR
.
(2)

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