MAXQ3210-EMX+ Maxim Integrated Products, MAXQ3210-EMX+ Datasheet - Page 14

• Manufacturer Part Number: MAXQ3210-EMX+
• Description: IC MCU 16BIT LP 24-DIP
• Manufacturer: Maxim Integrated Products
• Series: MAXQ™r

Specifications of MAXQ3210-EMX+

• Core Processor: RISC
• Core Size: 16-Bit
• Speed: 3.6MHz
• Peripherals: LED, Power-Fail Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: EEPROM
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-DIP (0.300", 7.62mm)
• Processor Series: MAXQ3210
• Core: RISC
• Data Bus Width: 16 bit
• Data Ram Size: 64 B
• Interface Type: JTAG
• Maximum Clock Frequency: 3.58 mhZ
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Operating Supply Voltage: 6 V to 9.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MAXQ3210-KIT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

Microcontroller with Internal Voltage Regulator,
Piezoelectric Horn Driver, and Comparator
Table 4. Peripheral Register Map
Note: Names that appear in italics indicate that all bits of a register are read-only. Names that appear in bold indicate that a register
is 16 bits wide.
14
REGISTER INDEX
____________________________________________________________________
Cxh
Dxh
0xh
1xh
2xh
3xh
4xh
5xh
6xh
7xh
8xh
9xh
Axh
Bxh
Exh
Fxh
M0 (x0h)
MODULE NAME (BASE SPECIFIER)
PWCN
HRNC
WUTC
WUT
EIE0
PO0
PO1
PI0
PI1
—
—
—
—
—
—
—
M1 (x1h)
T2CNA
T2CNB
CMPC
T2CH
T2RH
T2H
T2V
T2R
T2C
—
—
—
—
—
—
—
M2 (x2h)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
REGISTER INDEX
1Cxh
1Dxh
10xh
11xh
12xh
13xh
14xh
15xh
16xh
17xh
18xh
19xh
1Axh
1Bxh
1Exh
1Fxh
M0 (x0h)
MODULE NAME (BASE SPECIFIER)
KEN0
KEN1
ICDF
PD0
PD1
—
—
—
—
—
—
—
—
—
—
—
M1 (x1h)
T2CFG
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
M2 (x2h)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—