MC9S08DV60CLF Freescale Semiconductor, MC9S08DV60CLF Datasheet - Page 245
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MC9S08DV60CLF
Manufacturer Part Number
MC9S08DV60CLF
Description
IC MCU 60K FLASH 3K RAM 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08DV60CLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DV60CLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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12.4.3
The eight data segment registers, each with bits DB[7:0], contain the data to be transmitted or received.
The number of bytes to be transmitted or received is determined by the data length code in the
corresponding DLR register.
Freescale Semiconductor
ID[2:0]
Field
RTR
IDE
7:5
4
3
Reset:
Reset:
W
W
R
R
Data Segment Registers (DSR0-7)
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in
Remote Transmission Request — This flag reflects the status of the Remote Transmission Request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
ID Extended — This flag indicates whether the extended or standard identifier format is applied in this buffer. In
the case of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In the case of a transmit buffer, the flag indicates to the MSCAN what type of identifier to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
7
x
7
x
Figure 12-31. Identifier Register 2 — Standard Mapping
Figure 12-32. Identifier Register 3 — Standard Mapping
= Unused; always read ‘x’
= Unused; always read ‘x’
6
x
6
x
Table 12-30. IDR1 Register Field Descriptions
MC9S08DV60 Series Data Sheet, Rev 3
5
x
5
x
4
x
4
x
Description
Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
x
x
3
3
2
x
2
x
Table
12-29.
x
x
1
1
0
x
0
x
245
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