MC9S08DV32MLF Freescale Semiconductor, MC9S08DV32MLF Datasheet - Page 350
![IC MCU 32K FLASH 2K RAM 48-LQFP](/photos/12/35/123536/mc9s08dv48amlf_sml.jpg)
MC9S08DV32MLF
Manufacturer Part Number
MC9S08DV32MLF
Description
IC MCU 32K FLASH 2K RAM 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08DV32MLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DV32MLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 17 Development Support
Figure 17-3
shows the host receiving a logic 1 from the target HCS08 MCU. Because the host is
asynchronous to the target MCU, there is a 0-to-1 cycle delay from the host-generated falling edge on
BKGD to the perceived start of the bit time in the target MCU. The host holds the BKGD pin low long
enough for the target to recognize it (at least two target BDC cycles). The host must release the low drive
before the target MCU drives a brief active-high speedup pulse seven cycles after the perceived start of the
bit time. The host should sample the bit level about 10 cycles after it started the bit time.
BDC CLOCK
(TARGET MCU)
HOST DRIVE
HIGH-IMPEDANCE
TO BKGD PIN
TARGET MCU
SPEEDUP PULSE
HIGH-IMPEDANCE
HIGH-IMPEDANCE
PERCEIVED START
OF BIT TIME
R-C RISE
BKGD PIN
10 CYCLES
EARLIEST START
OF NEXT BIT
10 CYCLES
HOST SAMPLES BKGD PIN
Figure 17-3. BDC Target-to-Host Serial Bit Timing (Logic 1)
MC9S08DV60 Series Data Sheet, Rev 3
350
Freescale Semiconductor
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