MC908GZ48VFAE Freescale Semiconductor, MC908GZ48VFAE Datasheet - Page 57

• Manufacturer Part Number: MC908GZ48VFAE
• Description: IC MCU 16K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GZ48VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.7.6 FLASH-2 Program Operation
Programming of the FLASH memory is done on a row basis. A row consists of 64 consecutive bytes with
address ranges as follows:
During the programming cycle, make sure that all addresses being written to fit within one of the ranges
specified above. Attempts to program addresses in different row ranges in one programming cycle will fail.
Use this step-by-step procedure to program a row of FLASH-2 memory:
The FLASH programming algorithm flowchart is shown in
A. Programming and erasing of FLASH locations can not be performed by code being executed from the
B. While these operations must be performed in the order shown, other unrelated operations may occur
C. It is highly recommended that interrupts be disabled during program/erase operations.
D. Do not exceed t
Freescale Semiconductor
10. Clear the PGM bit.
11. Wait for time, t
12. Clear the HVEN bit.
13. Wait for a time, t
1. Set the PGM bit in the FLASH-2 control register (FL2CR). This configures the memory for program
2. Read the FLASH-2 block protect register (FL2BPR).
3. Write to any FLASH-2 address within the row address range desired with any data.
4. Wait for time, t
5. Set the HVEN bit.
6. Wait for time, t
7. Write data byte to the FLASH-2 address to be programmed.
8. Wait for time, t
9. Repeat step 7 and 8 until all the bytes within the row are programmed.
•
•
•
•
same FLASH array.
between the steps. However, care must be taken to ensure that these operations do not access any
address within the FLASH array memory space such as the COP control register (COPCTL) at
$FFFF.
programming time to the same row before next erase. t
$XX00 to $XX3F
$XX40 to $XX7F
$XX80 to $XXBF
$XXC0 to $XXFF
operation and enables the latching of address and data programming.
t
NVS
+ t
NVH
Only bytes which are currently $FF may be programmed.
+ t
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
PROG
NVS
PGS
NVH
PGS
PROG
RCV
(minimum 10 μs).
(minimum 5 μs).
(minimum 5 μs).
maximum or t
+ (t
, (typically 1 μs) after which the memory can be accessed in normal read mode.
(minimum 30 μs).
PROG X
64)
HV
≤
maximum. t
t
HV
maximum
NOTES
NOTE
HV
is defined as the cumulative high voltage
Figure
HV
must satisfy this condition:
2-10.
FLASH-2 Memory (FLASH-2)
57