MAC7101MAG40 Freescale Semiconductor, MAC7101MAG40 Datasheet - Page 17

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MAC7101MAG40

Manufacturer Part Number
MAC7101MAG40
Description
IC MCU 32BIT FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MAC7xxxr
Datasheet

Specifications of MAC7101MAG40

Core Processor
ARM7
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
DMA, POR
Number Of I /o
112
Program Memory Size
544KB (544K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 32x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MAC7101MAG40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
The capacitance C
The stabilization delays shown in
component selection (for example, the crystal and XFC filter).
3.8.2.1
With each transition of the clock f
voltage to the VCO is adjusted accordingly. The adjustment is done continuously with no abrupt changes
in the clock output frequency. Noise, voltage, temperature and other factors cause slight variations in the
control loop resulting in a clock jitter. This jitter affects the real minimum and maximum clock periods as
illustrated in
eliminate the effect of PLL jitter to a large extent.
The relative deviation of t
larger number of clock periods (N). Thus, jitter is defined as:
For N < 100, the following equation is a good fit for the maximum jitter:
Freescale Semiconductor
Jitter Information
Figure
0
J(N)
P
should be chosen in the range of:
4. It is important to note that the pre-scaler used by timers and serial modules will
t
MIN1
t
t
NOM
MAX1
0 1
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
NOM
Figure 5. Maximum Bus Clock Jitter Approximation
1
J N
( )
is at its maximum for one clock period, and decreases towards zero for
CMP
Table 20
5
=
, the deviation from the reference clock f
max 1
C
Figure 4. Jitter Definitions
S
÷
J N
2
( )
20
are dependant on PLL operational settings and external
t
MIN
t
------------------- -
N t
t
MAX
=
10
MAX
Preliminary
C
(N)
P
------- -
NOM
j
(N)
( )
1
N
N
C
+
S
,
j
3
2
÷
1
10
------------------- -
N t
t
15
MIN
( )
NOM
N
N–1
20
REF
N
Electrical Characteristics
is measured and input
N
Eqn. 14
Eqn. 15
Eqn. 16
17

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