M30263F6AFP#U7 Renesas Electronics America, M30263F6AFP#U7 Datasheet - Page 63

• Manufacturer Part Number: M30263F6AFP#U7
• Description: IC M16C/26A MCU FLASH 42SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30263F6AFP#U7

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 33
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
e
E
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J
1
Figure 7.7. PLC0 Register
0
6
2
9
C
0 .
B
2 /
0
0
2
6
0
F
A
2
e
0 -
b
PLL control register 0
G
b7
1 .
NOTES:
2
o r
0
, 5
b6
0
1. Write to this register after setting the PRC0 bit in the PRCR register to "1" (write enable).
2. When the PM21 bit in the PM2 register is "1" (clock modification disable), writing to this register has
3. These three bits can only be modified when the PLC07 bit is set to "0" (PLL turned off). The value once
4. Before setting this bit to "1" , set the CM07 bit to "0" (main clock), set the CM17 and CM16 bits to
0
u
2
p
no effect.
written to this bit cannot be modified.
"00
0 1
b5
0
(
0
M
2
7
" (main clock undivided mode), and set the CM06 bit to "0" (CM16 and CM17 bits enable).
b4
1
6
b3
C
page 44
2 /
b2
6
, A
b1
M
b0
f o
1
6
3
C
PLC00
PLC01
PLC02
PLC07
(b6-b5)
2
symbol
(b4)
9
(b3)
2 /
Bit
Symbol
PLC0
6
(1, 2)
, B
M
PLL multiplying factor
select bit
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Operation enable bit
Reserved bit
Reserved bit
1
6
C
2 /
Bit name
6
) T
Address
001C
(3)
(4)
16
b2
Must set to "1"
Must set to "0"
0: PLL Off
1: PLL On
0 0 0:
0 0 1: Multiply by 2
0 1 0: Multiply by 4
0 1 1:
1 0 0:
1 0 1:
1 1 0:
1 1 1:
b1b0
Do not set
Do not set
After reset
0001 X010
Function
2
7. Clock Generation Circuit
RW
RW
RW
RW
RW
RW
RW