MCR908JK3MDWE Freescale Semiconductor, MCR908JK3MDWE Datasheet - Page 92
MCR908JK3MDWE
Manufacturer Part Number
MCR908JK3MDWE
Description
IC MCU 4K FLASH 20-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC68HC908JK1CDW.pdf
(212 pages)
Specifications of MCR908JK3MDWE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LED, LVD, POR, PWM
Number Of I /o
15
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
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System Integration Module (SIM)
7.7.2 Stop Mode
Technical Data
90
NOTE:
NOTE:
In stop mode, the SIM counter is reset and the system clocks are
disabled. An interrupt request from a module can cause an exit from stop
mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset or break also causes an exit from stop mode.
The SIM disables the oscillator signals (OSCOUT and 2OSCOUT) in
stop mode, stopping the CPU and peripherals. Stop recovery time is
selectable using the SSREC bit in the configuration register (CONFIG).
If SSREC is set, stop recovery is reduced from the normal delay of 4096
2OSCOUT cycles down to 32. This is ideal for applications using canned
oscillators that do not require long start-up times from stop mode.
External crystal applications should use the full stop recovery time by
clearing the SSREC bit.
A break interrupt during stop mode sets the SIM break stop/wait bit
(SBSW) in the break status register (BSR).
The SIM counter is held in reset from the execution of the STOP
instruction until the beginning of stop recovery. It is then used to time the
recovery period.
To minimize stop current, all pins configured as inputs should be driven
to a logic 1 or logic 0.
CPUSTOP
NOTE: Previous data can be operand data or the STOP opcode, depending on the last
R/W
IAB
IDB
instruction.
System Integration Module (SIM)
STOP ADDR
Figure 7-18. Stop Mode Entry Timing
Figure 7-18
PREVIOUS DATA
STOP ADDR + 1
shows stop mode entry timing.
NEXT OPCODE
SAME
MC68H(R)C908JL3
Freescale Semiconductor
SAME
SAME
SAME
—
Rev. 1.1
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