HD64F3664FY Renesas Electronics America, HD64F3664FY Datasheet - Page 27
HD64F3664FY
Manufacturer Part Number
HD64F3664FY
Description
IC H8 MCU FLASH 32K 48QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.US3664-BAG1.pdf
(446 pages)
Specifications of HD64F3664FY
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
48-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F3664FYV
Manufacturer:
RENE
Quantity:
5 325
Company:
Part Number:
HD64F3664FYV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 1 Overview
Table 1.1
Section 2 CPU
Table 2.1
Table 2.2
Table 2.3
Table 2.3
Table 2.4
Table 2.5
Table 2.6
Table 2.6
Table 2.7
Table 2.8
Table 2.9
Table 2.10
Table 2.11
Table 2.12
Table 2.12
Section 3 Exception Handling
Table 3.1
Table 3.2
Section 4 Address Break
Table 4.1
Section 5 Clock Pulse Generators
Table 5.1
Section 6 Power-Down Modes
Table 6.1
Table 6.2
Table 6.3
Section 7 ROM
Table 7.1
Table 7.2
Table 7.3
Pin Functions ............................................................................................................ 9
Operation Notation ................................................................................................. 24
Data Transfer Instructions....................................................................................... 25
Arithmetic Operations Instructions (1) ................................................................... 26
Arithmetic Operations Instructions (2) ................................................................... 27
Logic Operations Instructions................................................................................. 28
Shift Instructions..................................................................................................... 28
Bit Manipulation Instructions (1)............................................................................ 29
Bit Manipulation Instructions (2)............................................................................ 30
Branch Instructions ................................................................................................. 31
System Control Instructions.................................................................................... 32
Block Data Transfer Instructions ............................................................................ 33
Addressing Modes .................................................................................................. 35
Absolute Address Access Ranges ........................................................................... 37
Effective Address Calculation (1)........................................................................... 39
Effective Address Calculation (2)........................................................................... 40
Exception Sources and Vector Address .................................................................. 52
Interrupt Wait States ............................................................................................... 62
Access and Data Bus Used ..................................................................................... 69
Crystal Resonator Parameters ................................................................................. 79
Operating Frequency and Waiting Time................................................................. 85
Transition Mode after SLEEP Instruction Execution and Interrupt Handling ........ 89
Internal State in Each Operating Mode................................................................... 90
Setting Programming Modes ................................................................................ 100
Boot Mode Operation ........................................................................................... 102
System Clock Frequencies for which Automatic Adjustment of
LSI Bit Rate is Possible ........................................................................................ 103
Tables
Rev. 6.00 Mar. 24, 2006 Page xxv of xxviii
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